基于IEEE 802.1AS的TSN时间同步系统设计  

Design of TSN Time Synchronization System Based on IEEE 802.1AS

作　　者：孙雷 乔庐峰 陈庆华 王雷淘 SUN Lei;QIAO Lufeng;CHEN Qinghua;WANG Leitao(Institute of Communication Engineering,Army Engineering University of PLA,Nanjing 210007,China)

机构地区：[1]陆军工程大学通信工程学院,江苏南京210001

出　　处：《电声技术》2021年第5期59-65,共7页Audio Engineering

摘　　要：时间敏感网络(Time Sensitive Network,TSN)使得以太网具有低延迟、低抖动以及确定性传输的优势。作为TSN技术体制的基础,时间同步能够确保TSN网络中的终端和节点设备具有相同的时间基准。基于Xilinx Zynq FPGA平台,采用软硬件协同设计的方法,提出实现IEEE 802.1AS时间同步所需的最佳主时钟选择、时间同步树建立以及时间校准的软硬件具体实现方案,给出具体的算法流程并进行分析。Time Sensitive Network(TSN)enables Ethernet to have the advantages of low latency,low jitter and deterministic transmission.As the basis of TSN,time synchronization can ensure the devices including terminals and switches in TSN networks have the same time benchmark.Based on Xilinx Zynq FPGA platform,software and hardware co-design method is adopted,the specific hardware and software implementation scheme of the best master clock selection,establishment of time synchronization tree and time calibration required for IEEE 802.1AS time synchronization,and associated algorithms are given and analyzed.

关 键 词：时间敏感网络 时间同步 最佳主时钟选择 时间校准 

分 类 号：TN92[电子电信—通信与信息系统]