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作 者:孙晓彤 靳晓诗[1] SUN Xiaotong;JIN Xiaoshi(School of Information Science and Engineering,Shenyang University of Technology,Shenyang 110870,China)
机构地区:[1]沈阳工业大学信息科学与工程学院,沈阳110870
出 处:《微处理机》2021年第4期25-28,共4页Microprocessors
摘 要:为了对传统MOSFET晶体管做出优化以减小其短沟道效应和源漏穿通效应,基于肖特基势垒隧穿效应,提出一种具有记忆功能的高集成双括号栅与双栅共同控制型场效应晶体管。器件通过增大金属与体硅面积实现肖特基隧穿效应,具有集成度高、导通电流更高、亚阈值摆幅更低、漏电流更小等优点。通过分析器件结构原理与关键参数,对单个晶体管的转移特性曲线进行仿真,结果表明,通过改变两个控制栅极栅压可以实现异或非门逻辑功能。该器件可以作为高密度神经元突触器件应用在二进制神经网络中。In order to optimize the traditional MOSFET to reduce its short channel effect and source-drain punch-through effect,based on Schottky barrier tunneling effect,a highly integrated double-bracket gate and duel-gate common control field effect transistor with memory function is proposed.The device realizes Schottky tunneling effect by increasing the area of metal and bulk silicon,and has the advantages of high integration,higher conduction current,lower subthreshold swing and smaller leakage current.By analyzing the structure principle and key parameters of the device,the transfer characteristic curve of single transistor is simulated.The results show that the logic function of the exclusive OR gate can be realized by changing the gate voltage of two control gates.The device can be used as a high-density synaptic device in binary neural networks.
分 类 号:TN386.3[电子电信—物理电子学]
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