一种低开销的三点翻转自恢复锁存器设计  

A Low-Cost Triple-Node-Upset-Resilient Latch Design

作　　者：黄正峰[1] 李先东 陈鹏 徐奇 宋钛 戚昊琛[1] 欧阳一鸣[2] 倪天明 HUANG Zhengfeng;LI Xiandong;CHEN Peng;XU Qi;Song Tai;QI Haochen;OUYANG Yiming;NI Tianming(School of Electronic Science&Applied Physics,Hefei University of Technology,Hefei 230601,China;School of Computer&Information,Hefei University of Technology,Hefei 230601,China;School of Electrical Engineering,Anhui Polytechnic University,Wuhu 241000,China)

机构地区：[1]合肥工业大学电子科学与应用物理学院,合肥230601 [2]合肥工业大学计算机与信息学院,合肥230601 [3]安徽工程大学电气工程学院,芜湖241000

出　　处：《电子与信息学报》2021年第9期2508-2517,共10页Journal of Electronics & Information Technology

基　　金：国家自然科学基金(61874156,61874157,61904001,61904047);安徽省自然科学基金(1908085QF272)。

摘　　要：随着集成电路特征尺寸的不断缩减,在恶劣辐射环境下,纳米级CMOS集成电路中单粒子三点翻转的几率日益增高,严重影响可靠性。为了实现单粒子三点翻转自恢复,该文提出一种低开销的三点翻转自恢复锁存器(LC-TNURL)。该锁存器由7个C单元和7个钟控C单元组成,具有对称的环状交叉互锁结构。利用C单元的阻塞特性和交叉互锁连接方式,任意3个内部节点发生翻转后,瞬态脉冲在锁存器内部传播,经过C单元多级阻塞后会逐级消失,确保LC-TNURL锁存器能够自行恢复到正确逻辑状态。详细的HSPICE仿真表明,与其他三点翻转加固锁存器(TNU-Latch, LCTNUT, TNUTL, TNURL)相比,LC-TNURL锁存器的功耗平均降低了31.9%,延迟平均降低了87.8%,功耗延迟积平均降低了92.3%,面积开销平均增加了15.4%。相对于参考文献中提出的锁存器,LC-TNURL锁存器的PVT波动敏感性最低,具有较高的可靠性。As the feature size of integrated circuits continues to scale down, under the harsh radiation environment, the probability of single event triple node upsets in nano-scale CMOS integrated circuits is increasing, seriously affecting reliability. In order to realize the resilient of single-event triple-node-upsets, a Low-Cost Triple-Node-Upset-Resilient Latch(LC-TNURL) is proposed. The latch is composed of seven Celements and seven clock-gating C-elements, and has a symmetrical ring-shaped cross-interlock structure. Using the interceptive characteristics of the C-elements and the cross-interlock connection mode, after any three internal nodes are flipped, the transient pulse propagates inside the latch. After the C-elements is blocked in multiple stages, it will disappear step by step to ensure the LC-TNURL latch can self-recover to the correct logic state. Detailed HSPICE simulation shows that the power consumption of the LC-TNURL latch is reduced by an average of 31.9%, the delay is reduced by an average of 87.8%, the power-delay product is reduced by an average of 92.3% and the area overhead is increased by an average of 15.4% compared to other triple-nodeupsets hardened latches(TNU-Latch, LCTNUT, TNUTL, TNURL). The LC-TNURL latch proposed in this paper is the least sensitive to PVT fluctuations and has high reliability compared with reference latches.

关 键 词：锁存器 抗辐射加固设计 C单元 自恢复 三点翻转 

分 类 号：TN43[电子电信—微电子学与固体电子学] TP302.8[自动化与计算机技术—计算机系统结构]