薄型SiP传感器封装平面度优化工艺  

Flatness Optimization for the Package of Thin SiP Sensors

作　　者：李建华 李港 夏卫生[2] LI Jianhua;LI Gang;XIA Weisheng(Shenzhen STS Microelectronics Co.,Ltd.,Shenzhen 518048,China;School of Materials Scienee and Engineering,Huazhong University of Science and Technology,Wuhan 430074,China)

机构地区：[1]深圳赛意法微电子有限公司,广东深圳518048 [2]华中科技大学材料科学与工程学院,湖北武汉430074

出　　处：《电子工艺技术》2021年第5期264-266,284,共4页Electronics Process Technology

基　　金：国家自然科学基金资助项目(61774066)。

摘　　要：基于系统集成封装(System in Package,SiP)的传感器件广泛应用于消费电子产品,随着产品厚度日趋变薄以及功能不断提升,对封装产品的平面度提出了更高要求。分别从材料特性选择、基板平面度控制以及封装内部作用力优化三个方面进行平面度试验与工艺优化研究。结果表明,选择CTE接近的保护盖和基板材料、增加真空吸附改善基板平面度、改变用胶量调整器件与基板间的相互作用力均可优化薄型SiP传感器封装的整体平面度。Sensor components based on system in package(SiP)are widely used in consumer electronic products.As the thickness of products becomes thinner and the functions continue to improve,higher requirements are placed on the flatness of packaged products.The flatness experiment and process optimization are studied from three aspects:material property selection,substrate flatness control and package internal force optimization.The results show that choosing the protective cover and substrate materials close to the CTE(Coefficient of Thermal Expansion),increasing the vacuum adsorption to improve the flatness of the substrate,and changing the amount of glue to adjust the interaction between the device and the substrate can optimize the overall flatness of the thin SiP sensor package.

关 键 词：薄型SiP 封装 传感器 平面度 工艺优化 

分 类 号：TN605[电子电信—电路与系统]