应用于CIS的高速低功耗LVDS驱动电路设计  

Design of High Speed and Low Power LVDS Driver Circuit Applied to CIS

作　　者：周游 高静 杜华军[2] Zhou You;Gao Jing;Du Huajun(Tianjin Key Laboratory of Imaging and Sensing Microelectronic Technology,School of Microelectronics,Tianjin University,Tianjin 300072,China;National Key Laboratory of Science and Technology on Aerospace Intelligent Control,Beijing Aerospace Automatic Control Institute,Beijing 100854,China)

机构地区：[1]天津大学微电子学院,天津市成像与感知微电子技术重点实验室,天津300072 [2]北京航天自动控制研究所宇航智能控制技术国家级重点实验室,北京100854

出　　处：《南开大学学报（自然科学版）》2021年第4期72-77,共6页Acta Scientiarum Naturalium Universitatis Nankaiensis

基　　金：国家重点研发计划(2017YFB1300101);天津市自然科学基金(17JCYBJC16000)。

摘　　要：随着CMOS图像传感器(CIS)在空间分辨率和时间分辨率的不断提升.CIS的数据量在不断增加;同时,现代社会对低功耗CIS的需求也越来越多.设计了应用于CIS的高速低功耗低压差分信号(LVDS)驱动电路.采用输出摆率控制的电流开关驱动器,该结构不需要在电流开关驱动器的输出端外接匹配电阻实现阻抗匹配.从而减小了电路的功耗;同时利用电流开关驱动器的电流源来实现预加重功能.没有额外的电流源和控制电流源的辅助电路,因此减小了LVDS驱动电路的整体功耗.论文采用0.13μm CMOS工艺绘制LVDS驱动电路的版图,面积为0.025 mm^(2).在不同工艺角、电源电压和温度下后仿结果为:LVDS驱动电路在速率为2 Gbit/s时的最高功耗为23.43 mW,此时在100Ω的终端电阻上的摆幅为439 mV,输出共模电平为1.26 V,抖动为15.0 ps.With the continuous improvement of spatial and temporal resolution of CMOS image sensor(CIS),the amount of CIS data is increasing.At the same time,the dema nd for low power CIS in modem society is also increasing.A high-speed low-power low-voltage differential signal(LVDS)driver circuit for CIS is designed.The current switching driver controlled by output swing rate is adopted.This structure does not need matching resistance outside the output terminal of the current switching driver to achieve impedance matching,thus reducing the power consumption of the circuit.At the same time,the current source of the current switch driver is used to realize the pre-emphasis function.There is no additional current source and auxiliary circuit to control the current source,so the overall power consumption of the LVDS driver circuit is reduced.0.13 μm CMOS process is used to plot the layout of LVDS driver circuit.with an area of 0.025 mm^(2).At different process angles,power supply voltage and temperature,the simulation results show that the maximum power consumption of LVDS driver circuit is 23.43 mW at a rate of 2 Gbit/s.At this time,the swing on the terminal resistance of 100Ω is 439 mV,the output common-mode level is 1.26 V,and the jitter is 15.0 ps.

关 键 词：CMOS图像传感器 低压差分信号 预加重 驱动电路 

分 类 号：TN492[电子电信—微电子学与固体电子学]