SOT-MRAM单元结构的改进及其低功耗写电路设计  

Improvement of SOT-MRAM cell structure and the design of its low-power write circuit

作　　者：颜思岑 袁磊 王少昊 黄继伟[1] YAN Si-cen;YUAN Lei;WANG Shao-hao;HUANG Ji-wei(College of Physics and Information Engineering,Fuzhou University)

机构地区：[1]福州大学物理与信息工程学院

出　　处：《中国集成电路》2021年第12期20-25,共6页China lntegrated Circuit

基　　金：国家重点基础研究发展计划(2018YFB0407603)。

摘　　要：本文提出了在典型2T1MTJ自旋轨道扭矩-磁随机存储器(SOT-MRAM)阵列的源极线上增加平衡晶体管的新结构,有效解决对一个存储单元进行同时读写操作时读、写电流不对称的问题。该方案还与自终止写电路设计相结合,进一步降低了SOT-MRAM整体功耗。仿真结果表明,与典型SOT-MRAM写电路方案相比,本文的方案有效降低了77.35%的写入功耗。This paper proposes a new structure in which balanced transistors are added to the source line of a typical2 T1 MTJ spin orbit torque-magnetic random access memory(SOT-MRAM)array, which effectively solves the problem of current asymmetry when reading and writing to a memory cell simultaneously. This solution is also combined with the self-terminating write circuit design to further reduce the overall power consumption of SOT-MRAM.The simulation results show that compared to the typical SOT-MRAM write circuit scheme,the scheme in this paper effectively reduces the writing power consumption by 77.35%.

关 键 词：自旋轨道扭矩-磁随机存储器(SOT-MRAM) 磁隧道结 低功耗 自终止 

分 类 号：TP333[自动化与计算机技术—计算机系统结构]