基于SystemVerilog的图像采集压缩卡芯片验证平台设计  

Verification platform of image compression card chip based on SystemVerilog

作　　者：王凯 王骞[1,2] 符云越 李拓 刘凯[1,2,3] Wang Kai;Wang Qian;Fu Yunyue;Li Tuo;Liu Kai(Shandong Massive Information Technology Research Institute,Jinan 250098,China;State Key Laboratory of High-end&Storage Technology,Inspur Electronic Information Industry Co.,Ltd.,Jinan 250101,China;Shandong Inspur Artificial Intelligence Research Institute Co.,Ltd.,Jinan 250101,China)

机构地区：[1]山东海量信息技术研究院,济南250098 [2]浪潮电子信息产业股份有限公司高效能服务器和存储技术国家重点实验室,济南250101 [3]山东浪潮人工智能研究院有限公司,济南250101

出　　处：《电子测量技术》2021年第20期29-36,共8页Electronic Measurement Technology

基　　金：山东省重大科技创新工程项目(2019JZZY010103)资助。

摘　　要：验证平台对视频采集压缩卡芯片的开发设计有重要作用。针对传统的验证平台在代码覆盖率以及测试效率方面存在的不足,设计了一款基于SystemVerilog搭建的验证平台,该验证平台采用面向对象程序语言设计,其中,PCIe host(RP)端采用Xilinx IP建模链路层和物理层,保证了PCIe总线环境与真实主机板卡环境相同;外部验证环境采用SystemVerilog分层设计的方法,并采用类思想进行上层验证环境设计,使较多验证组件能够移植至同一接口协议的不同类SoC;此外,在自动化验证阶段,通过仿真报告自动判断case状态,调整随机基准以及在覆盖率报告中追踪未覆盖模块路径,极大地改善了代码的边角覆盖情况,加速了回归收敛。从采集压缩仿真过程、验证自动化以及覆盖率3个方面对该验证平台进行了分析,结果表明,该验证平台可快速完成相似设计的验证模组横向移植,提高相似功能芯片的验证可靠性,节省人力,加快仿真进度,加速覆盖率收敛,缩短验证周期,增加流片成功率。The verification platform plays an important role in the design of the video acquisition and compression card chip.Aiming at the shortcomings of traditional verification platforms in terms of code coverage and test efficiency,designed a SystemVerilog-based verification platform.The verification platform is designed with an object-oriented programming language,where the PCIe host(RP)adopts the Xilinx IP modeling link layer and the physical layer,ensuring that the PCIe bus environment is the same as the real host board card environment.The external verification environment adopts the SystemVerilog hierarchical design method,and adopts the class idea to design the upper-layer verification environment,so that more verification components can be transplanted to different types of SoC of the same interface protocol.Moreover,in the automated verification stage,the case state is automatically judged by the simulation report,adjusting the random benchmark and tracking the uncovered module paths in the coverage report,which greatly improves the corner coverage of the code and accelerates the regression convergence.The verification platform is analyzed from three aspects:acquisition and compression simulation process,verification automation,and coverage.The results show that the verification platform can quickly complete the horizontal verification module transplantation of similar design,improve the verification reliability of similar function chips,save manpower,accelerate the simulation progress,accelerate the coverage convergence,shorten the verification cycle and increase the success rate of flow chip.

关 键 词：SYSTEMVERILOG 功能验证 自动化验证 覆盖率收敛 

分 类 号：TN402[电子电信—微电子学与固体电子学] TP391.9[自动化与计算机技术—计算机应用技术]