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作 者:王新炜 王发强[1] 周洪伟 张建松 WANG Xinwei;WANG Faqiang;ZHOU Hongwei;ZHANG Jiansong(State Key Laboratory of Electrical Insulation and Power Equipment,School of Electrical Engineering,Xi′an Jiaotong University,Xi′an 710049,China;TBEA Xi′an Electric Technology Co.,Ltd.,Xi′an 710119,China)
机构地区:[1]西安交通大学电气工程学院电力设备电气绝缘国家重点实验室,陕西西安710049 [2]特变电工西安电气科技有限公司,陕西西安710119
出 处:《电工技术》2021年第23期20-24,共5页Electric Engineering
摘 要:考虑数字控制系统中的采样时刻和延迟时间,针对数字控制Zeta变换器,建立该系统的采样小信号模型。同时考虑量化效应的影响,得出了ADC和DPWM量化过程的输入输出函数曲线,并通过图解的方式推导出系统出现量化极限环的边界条件。基于Saber电路仿真软件设计数字控制Zeta变换器的电路仿真模型,仿真结果验证了理论分析的正确性。研究结果表明:当DPWM量化步长过大时,由于不存在稳定的稳态工作点,因此系统中会出现静态量化极限环,使数字控制Zeta变换器处于振荡状态且振荡频率小于系统的开关频率,造成该系统中的功率开关管和二极管的电压应力和电流应力增大,同时加大了输入滤波器设计的难度。Considering the sample time and delay time,for digital voltage controlled zeta converter,the sampling small signal model of the system is established.At the same time,considering the influence of quantization effect,the input-output function curves of ADC and DPWM quantization process are obtained,and the boundary conditions for the occurrence of quantization limit cycles are derived by graphical method.The circuit simulation model of digital control zeta converter is designed based on Saber circuit simulation software.The simulation results verify the correctness of the theoretical analysis.The results show that when the quantization step of DPWM is too large,there is no stable steady-state operating point.Therefore,the static quantization limit cycle will appear in the system,so that the digital voltage controlled zeta converter is in the oscillation state and the oscillation frequency is less than the switching frequency of the system,resulting in the increase of voltage stress and current stress of power switches and diodes in the system,and increasing the difficulty of input filter design.
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