基于数字锁相环的FPGA多通道频率测量系统设计  

Multi Channel Frequency Meter System Based on FPGA Digital Phase Locked Loop

作　　者：金鑫[1] 田文杰[1] 刘迪 陈福彬[1] JIN Xin;TIAN Wen-jie;LIU Di;CHEN Fu-bin(Sensor Key Laboratory,Beijing Information Science and Technology University,Beijing 100101,China)

机构地区：[1]北京信息科技大学传感器重点实验室,北京100101

出　　处：《仪表技术与传感器》2022年第2期52-56,共5页Instrument Technique and Sensor

基　　金：北京市自然科学基金重点资助项目(KZ201511232037);北京信息科技大学促进高校分类发展项目(20202021A)。

摘　　要：针对传统频率测量电路复杂、采集速度较慢的问题,基于FPGA(现场可编程逻辑门阵列),采用全数字锁相环对待测量信号进行倍频,辅以自适应时钟模块、计数模块和串口接收发送模块,设计了多通道频率测量系统,从而达到精简电路并实现对多路待测信号的快速精准测量。实验结果表明,对于100 Hz~10 MHz频率的稳定信号,测量时间仅为100 ms,与标准频率计相比,相对误差<0.5 ppm(1 ppm=10^(-6))。可用于多路频率信号的实时采集测量。In order to solve the problem of complex traditional frequency measurement circuit and slow acquisition speed,a multi-channel frequency measurement system was designed based on FPGA(field programmable gate array),using all digital phase-locked loop to double the measured signal,supplemented by adaptive clock module,counting module and serial port receiving and sending module,so as to simplify the circuit and realize the fast detection of multi-channel signals accurate measurement.The experimental results show that the measurement time is only 100 ms for 100 Hz~10 MHz frequency signal,and the relative error is less than 0.5 ppm(1 ppm=10^(-6))compared with the standard frequency meter.It can be used in the field of multi-channel frequency signal real-time acquisition and measurement.

关 键 词：FPGA 数字锁相环 自适应时钟 多通道频率测量 串口通讯 

分 类 号：TP274[自动化与计算机技术—检测技术与自动化装置]