一款DC~40 GHz六位数控衰减器芯片设计  

Design of a DC to 40 GHz 6 bit digital attenuator MMIC

作　　者：李光超 周睿涛 蒋乐 张镇 豆兴昆 LI Guangchao;ZHOU Ruitao;JIANG Le;ZHANG Zhen;DOU Xingkun(China Key System&Integrated Circuit Co.,Ltd.,Wuxi 214000,China)

机构地区：[1]中科芯集成电路有限公司,江苏无锡214000

出　　处：《电子设计工程》2022年第5期175-179,共5页Electronic Design Engineering

摘　　要：针对微波通信等领域的整机系统对超宽带数控衰减器的需求,采用GaAs pHEMT 0.15μm工艺研制了一款DC~40 GHz带数字驱动的6位数控衰减器芯片。衰减器电路采用6个基本衰减单元级联结构,每个衰减单元采用合适的电路拓扑,通过合理优化后,实现了低插入损耗、高衰减精度、低衰减附加相移和小尺寸的目标。由芯片在片测试结果可知,插入损耗小于6.5 dB,输入输出电压驻波比小于1.8:1,均方根衰减精度(64态)小于0.8 dB,全态衰减附加相移小于±10°,静态功耗为3 mA@-5 V,芯片尺寸为2.08 mm×1.1 mm×0.1 mm。Demand for ultra-wideband digital control attenuators in the complete machine system of microwave communication and other fields,a DC to 40 GHz 6 bit MMIC digital attenuator using 0.15 μm GaAs pHEMT process technology was designed. The attenuator circuit is composed of six basic attenuation units cascaded,and each attenuator unit selects an appropriate circuit topology. After reasonable optimization,the goals of low insertion loss,high attenuation accuracy,low attenuation additional phase shift and small size are achieved. On-wafer measure results of the chip are insertion loss<6.5 dB,input and output VSWR<1.8:1,64-state Root Mean Square(RMS) error<0.8 dB,phase variation<±10°,static power consumption is 3 mA@-5 V,the chip size is 2.08 mm×1.1 mm×0.1 mm.

关 键 词：砷化镓 超宽带 低衰减附加相移 数控衰减器 数字驱动器 

分 类 号：TN715[电子电信—电路与系统]