抗干扰全集成超宽带低噪声放大器的设计  被引量:1

Design of fully integrated UWB Low Noise Amplifier with interference rejection

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作  者:高宇飞 雷倩倩[1] 潘诚 刘启航 GAO Yufei;LEI Qianqian;PAN Cheng;LIU Qihang(School of Science,Xi’an Polytechnic University,Xi’an 710048,China)

机构地区:[1]西安工程大学理学院,陕西西安710048

出  处:《电子设计工程》2022年第10期81-84,89,共5页Electronic Design Engineering

基  金:国家重点研发计划项目(2018YFB2200500)。

摘  要:设计了一款应用于超宽带协议的具有带外噪声抑制功能的全集成低噪声放大器(LowNoise Amplifier,LNA)。通过在LNA中集成无源陷波滤波器来抑制5~6 GHz的带外信号,并分析了片上电感的寄生参数对滤波效果的影响;采用并联电阻反馈共源共栅结构和并联补偿技术来实现宽带。基于SMIC 28 nmCMOS工艺,使用EMX软件对所设计的LNA进行了电磁建模提参,采用Cadence Virtuoso对电路进行仿真验证,结果表明,该LNA在6.5~10 GHz的工作频带内,S21介于22.77 dB到24.51 dB之间,较为平坦;S11小于-12.34 dB;S22小于-12.34 dB;S12小于-45.06 dB;带内噪声系数较小,介于2.35 dB到2.82 dB之间。全集成片上带阻滤波器在5.8 GHz处可提供-14.6 dB的噪声抑制。在0.9 V供电电压下,LNA的静态功耗仅为10.7 mW(含偏置)。A fully integrated Low Noise Amplifier(LNA)with out-of-band noise rejection for the ultra-wide-band wireless communication is designed.The 5~6 GHz out-of-band signal is suppressed by integrating a passive notch filter in the LNA,and the influence of the parasitic parameters of the on-chip inductor was analyzed on the characteristic of filtering;resistive shunt feedback cascode structure and shunt peaking technology were adopted to achieve wideband.Based on the SMIC 28 nm CMOS process,the designed LNA is simulated by Cadence Virtuoso after electromagnetic modeled and parameter extraction by EMX platform.The results show that within the band of 6.5~10 GHz,S21 is between 22.77 dB and 24.51 dB,which is relatively flat;S11 is less than-12.34 dB;S22 is less than-12.34 dB;S12 is less than-45.06 dB.The in-band noise figure is small,between 2.35 dB and 2.82 dB.The fully integrated on-chip band stop filter can provide-14.6 dB of rejection at 5.8 GHz.Under 0.9 V voltage supply,the static power consumption of the LNA is only 10.7 mW(including bias).

关 键 词:陷波滤波器 宽带高频放大器 低噪声放大器 UWB 

分 类 号:TN722.3[电子电信—电路与系统]

 

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