基于X86平台的EtherCAT主站设计与实时性优化方案  被引量:4

EtherCAT's Master Design and Real-time Optimization Scheme Based on X86 Platform

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作  者:陈韦达 张冈[1] 陈冰[1] 崔自赏 CHEN Wei-da;ZHANG Gang;CHEN Bing;CUI Zi-shang(School of Mechanical Science&Engineering,Huazhong University of Science and Technology,Wuhan 430000,China)

机构地区:[1]华中科技大学机械科学与工程学院,湖北武汉430000

出  处:《仪表技术与传感器》2022年第5期37-41,共5页Instrument Technique and Sensor

基  金:湖北省重点研发计划(2021BAA041)。

摘  要:EtherCAT是工业以太网总线的代表应用,现已在嵌入式、FPGA等多个平台下开发应用,但在X86架构上的实时应用较少。基于X86的硬件平台,使用实时补丁与EtherCAT协议框架,设计性能稳定的EtherCAT主站。提出内核模块的设计方法,以及隔离CPU,设置CPU频率的运行方式,进行实时性能的优化。在200μs的高速通信周期下,最大抖动从ms级优化到50μs以内,抖动均值从80μs优化到1μs以内。满足高性能实时运动控制与高速数据采集的要求。EtherCAT is a representative application of industrial Ethernet bus,which has been developed for embedded,FPGA and other platforms,but lacks real-time application on X86 architecture.Based on the X86 hardware platform,the EtherCAT master with stable performance was designed using real-time patches and EtherCAT protocol framework.The design method of the kernel module was proposed,as well as the isolation of the CPU,the operation mode of the CPU frequency was set,and the real-time performance was optimized.At a high-speed communication cycle of 200μs,the maximum jitter was optimized from millisecond to less than 50μs,and the jitter mean was optimized from 80μs to less than 1μs,which meet the requirements of high-performance real-time motion control and high-speed data acquisition.

关 键 词:X86 ETHERCAT 实时性 LINUX内核 CPU负载 优化 高速数据采集 

分 类 号:TP273[自动化与计算机技术—检测技术与自动化装置]

 

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