多层堆叠扇出型集成热仿真分析及优化  

Thermal Simulation Analysis and Optimize of Multilayer Stacking Structure of Fan-out Integration

作　　者：李杨[1] 蔡绪峰 王剑峰 明雪飞[1] 刘国柱[1] LI Yang;CAI Xu-feng;WANG Jian-feng;MING Xue-fei;LIU Guo-zhu(The 58th Research Institute of China Electronics Technology Group Corporation)

机构地区：[1]中国电子科技集团公司第五十八研究所

出　　处：《中国集成电路》2022年第8期69-74,共6页China lntegrated Circuit

摘　　要：随着电子封装集成密度的不断增加,散热成为影响集成可靠性的一项重要指标。本文分析了一种通过铜柱实现上下互连的三层堆叠的扇出集成结构的散热性能,并研究了塑封料厚度、铜柱尺寸、铜柱与芯片间距和铜柱分布方式对该结构散热的影响。研究发现,对于三层堆叠的扇出结构,在自然冷却下进行散热时,中间层芯片的结温最高,底层芯片结温最低。同时,铜柱尺寸的改变对散热没有显著作用,而通过增加模塑料厚度,减小铜柱与芯片的间距以及改变铜柱分布方式,均可以有效提高此三层堆叠的扇出集成结构的散热能力。With the increasing of package integration,heat dissipation has become an important indicator of package reliability.This paper analyzed the thermal performance of a three-layer stack fan-out package structure,which is interconnected up and down through copper pillars.In addition,the effects of some parameters,such as the molding compound thickness,the copper pillar size,the distance between copper pillar and chip and the distribution of copper pillars on heat dissipation has also been studied.For such structure,the study found that,the junction temperature of intermediate layer chip is the highest,the lowest junction temperature appears on the bottom chip under nature cooling.At the same time,the change of copper pillar size has no significant effect on heat dissipation.However,the thermal performance of the three-layer stacking structure of fan-out package can be improved effectively by increasing the thickness of the molding compound,reducing the distance between copper pillar and chip and changing the distribution of copper pillars.

关 键 词：扇出型集成 三维堆叠 热仿真 分析优化 

分 类 号：TN405[电子电信—微电子学与固体电子学] TK124[动力工程及工程热物理—工程热物理]