采用分段平移技术校正流水线A/D转换器级间增益的方法  

A Method of Calibrating Interstage Gain of Pipeline A/D Converter by Piecewise Shift Technique

作　　者：雷郎成[1] 王忠焰 詹勇 刘虹宏 胡永菲 杜宇彬 付东兵[1] LEI Langcheng;WANG Zhongyan;ZHAN Yong;LIU Honghong;HU Yongfei;DU Yubin;FU Dongbing(The 24th Research Institute of China Electronics Technology Group Corp.,Chongqing 400060,P.R.China)

机构地区：[1]中国电子科技集团公司第二十四研究所,重庆400060

出　　处：《微电子学》2022年第4期587-596,共10页Microelectronics

基　　金：模拟集成电路国家级重点实验室基金资助项目(6142802010702)。

摘　　要：分析了流水线A/D转换器采样电容与反馈电容之间的增益失配,探究了运放有限增益与流水线残差输出及A/D转换器输出的关系,建立了精确的系统模型。通过建立14位流水线A/D转换器Verilog-A的行为级模型,在数字域对流水线A/D转换器输出数字码进行分段平移。在第一级级间增益误差达到±0.0125时,校正前信噪比仅为62 dB,校正后信噪比提升到85 dB。提出的校正方法可有效补偿由流水线级间增益导致的数字输出不连续和线性度下降。The gain mismatch between sampling capacitance and feedback capacitance in pipeline A/D converters was analyzed.The relationship between the finite gain of operational amplifier and pipeline residual output,as well as the output of A/D converter,was investigated.So an accurate system model was established.Based on the Verilog-A behavioral model of 14 bit pipelined ADC,the digital output of pipelined ADC was shifted piecewisely in digital domain.When the inter-stage gain error of first stage reached±0.0125,the SNR was only 62 dB before calibration,and it was 85 dB after calibration.The proposed calibration method could compensate for the discontinuity of digital output and the linearity degeneration caused by inter-stage gain errors.

关 键 词：流水线A/D转换器 增益失配 运放有限增益 流水线级间增益误差 

分 类 号：TN792[电子电信—电路与系统]