面向微小卫星基于FPGA的星载总线扩展  

Extension of on⁃board bus for microsatellite based on FPGA

作　　者：倪淑燕 程凌峰 陈世淼 程乃平 NI Shuyan;CHENG Lingfeng;CHEN Shimiao;CHENG Naiping(Department of Electronic and Optical Engineering,Space Engineering University,Beijing 101416,China;Department of Graduate Management,Space Engineering University,Beijing 101416,China)

机构地区：[1]航天工程大学电子与光学工程系,北京101416 [2]航天工程大学研究生院,北京101416

出　　处：《电子设计工程》2022年第22期40-45,共6页Electronic Design Engineering

基　　金：军队科研项目(1700050400)。

摘　　要：为提高卫星集成度,采用了一种基于FPGA的星载总线扩展方法,在星载处理器SmartFusion2的FPGA模块上进行IP核设计,实现了“两级双冗余CAN+RS422”的星载总线通信架构。基于微小卫星的处理器和总线架构进行了FPGA扩展星载总线的方案设计,通过对CAN总线和RS422接口的扩展进行了IP核设计,使用Modelsim进行仿真,在处理器上运行星务软件,实现星上部组件通信正常的实验,进一步验证了该设计的合理性和有效性。通过FPGA实现星载总线扩展,可有效提高微小卫星集成度,对微小卫星研究具有参考意义。In order to improve the integration of satellites,an FPGA⁃based on⁃board bus expansion method is adopted.The IP core is designed on the FPGA module of the on⁃board processor SmartFusion2,and the"two⁃level dual⁃redundant CAN+RS422"on⁃board bus is realized.Communication architecture.Based on the microsatellite processor and bus architecture,the FPGA extended on⁃board bus was designed.The IP core was designed through the expansion of the CAN bus and RS422 interface.The simulation was carried out through Modelsim,combined with the running of the satellite service software on the processor.The experiment to realize the normal communication of the upper component on the satellite further verifies the rationality and effectiveness of the design.The realization of on⁃board bus expansion through FPGA can effectively improve the integration of microsatellite,which has reference significance for the research of microsatellite.

关 键 词：星载总线 现场可编程门阵列 微小卫星 CAN总线 IP核 综合电子系统 

分 类 号：TP702[自动化与计算机技术—检测技术与自动化装置]