一种应用于24 GHz毫米波雷达系统的低功耗中频信号处理电路  

A Low-power Intermediate Frequency Signal Processing Circuit for 24 GHz Millimeter Wave Radar System

作　　者：冯凯 石春琦[1] 张旭 陈光胜 张润曦[1] FENG Kai;SHI Chunqi;ZHANG Xu;CHEN Guangsheng;ZHANG Runxi(Institute of Microelectronic Circuit and System,East China Normal University,Shanghai,200062,CHN;Shanghai Eastsoft Microelectronics Co.,Shanghai,200235,CHN)

机构地区：[1]华东师范大学微电子电路与系统研究所,上海200062 [2]上海东软载波微电子有限公司,上海200235

出　　处：《固体电子学研究与进展》2022年第5期363-370,共8页Research & Progress of SSE

基　　金：中央高校基本科研业务费专项资金资助(40500-20103-222178);上海市科委资助项目(18DZ2270800);华东师范大学“幸福之花”(智能+)先导研究基金项目(4430019311542500)。

摘　　要：介绍了一款应用于24 GHz双模式毫米波汽车雷达收发机系统的中频信号处理电路,包括模拟基带和Sigma-Delta调制器两部分。模拟基带中通过两个Tow-Thomas二阶节级联构成低通滤波器对中频信号进行滤波和放大,同时集成电流注入式直流失调消除电路对中频信号输入时存在的DC偏差进行消除。Sigma-Delta调制器将基带处理后的中频信号量化为一位数字码流。该调制器采用单环前馈式1 bit量化结构,四级积分器由Active-RC滤波器实现,并且引入本地反馈电阻提升带内噪声整形效果,为节省功耗,同时采用前馈结构、无源求和电路和动态式比较器。基于55 nm CMOS工艺设计制作整体雷达收发机系统芯片,并对本文的中频信号处理电路进行测试,测试结果表明:该电路功耗为13 mW,增益范围覆盖0~60 dB,3 dB带宽大于160 kHz,且采样时钟频率为40 MHz时,在8 kHz输入条件下可获得67.5 dB的无杂散动态范围,在160 kHz输入条件下可获得63.9 dB的无杂散动态范围。An intermediate frequency(IF)signal processing circuit for the 24 GHz dual-mode mm-wave automotive radar transceiver system was introduced in this paper,including analog base-band(ABB)and sigma-delta modulator(DSM).In the ABB,two Tow-Thomas second-order sec-tions cascaded to form a low-pass filter to filter and amplify the IF signal.At the same time,a current injection-type DC offset cancellation(DCOC)circuit was integrated to eliminate the DC offset that ex-isted when the IF signal was input.The sigma-delta modulator quantized the baseband-processed IF signal into a one-bit digital code stream.The modulator’s structure was a single loop feedforward sin-gle-bit quantization type and four integrators were implemented by Active-RC filter.Also,local-feed-back resistors were used to improve the in-band noise shaping effect.In order to save power consump-tion,feedforward structure,passive summing circuit and dynamic comparator were adopted at the same time.The overall radar transceiver system chip was designed based on 55 nm CMOS process,and the IF signal processing circuit of this paper was tested.The test results show that the circuit con-sumes 13 mW of power consumption,the gain range covers 0-60 dB,the 3 dB bandwidth is greater than 160 kHz,and when the sampling clock frequency is 40 MHz,a spurious-free dynamic range(SF-DR)of 67.5 dB can be obtained under 8 kHz input condition and a spurious-free dynamic range of 63.9 dB can be obtained under 160 kHz input condition.

关 键 词：毫米波雷达 中频信号 模拟基带 SIGMA-DELTA调制器 Active-RC积分器 动态比较器 无源求和电路 

分 类 号：TN43[电子电信—微电子学与固体电子学]