忆阻器混合逻辑电路设计及其应用  

Design and application of memristor hybrid logic circuit

作　　者：代广珍 赵振宇 宋兴文 韩名君 倪天明 Guangzhen DAI;Zhenyu ZHAO;Xingwen SONG;Mingjun HAN;Tianming NI(Key Laboratory of Advanced Perception and Intelligent Control of High-end Equipment,Ministry of Education,Wuhu 241000,China;School of Electrical Engineering,Anhui Polytechnic University,Wuhu 241000,China)

机构地区：[1]高端装备先进感知与智能控制教育部重点实验室,芜湖241000 [2]安徽工程大学电气工程学院,芜湖241000

出　　处：《中国科学：信息科学》2023年第1期178-190,共13页Scientia Sinica(Informationis)

基　　金：国家自然科学基金(批准号:62174001);安徽省自然科学基金杰出青年项目(批准号:2208085J02);安徽省重点研发计划项目(批准号:202104b11020032);安徽省高校优秀科研创新团队(批准号:2022AH010059);安徽工程大学中青年拔尖人才计划资助项目。

摘　　要：为解决传统集成电路面积大、功耗高等问题,采用纳米级忆阻器设计实现了数字逻辑电路中的加法器和乘法器.基于忆阻器MRL结构设计的OR门和AND门,设计了2T-4M结构的XOR和XNOR逻辑门.运用这些逻辑门与CMOS管混合实现了全加器,其中CMOS反相器增强了信号驱动.改进2T-4M结构实现了一种新型2T-4M逻辑模块,并基于此模块设计了2位二进制乘法器.LTspice仿真验证了电路设计的正确性.与已报道的MRL结构全加器和2位二进制乘法器进行比较发现全加器使用的元器件数量明显减少,延迟时间最少提高了53.3%,功耗最小降低了1.93 m W;2位二进制乘法器的设计在元器件总体使用数量上也有一定的优势,总共只需要18个元器件.最后,利用全加器构成加密阵列电路,对图像进行了加解密操作,验证了电路在实际应用中的可行性.To address the large area and high power consumption issues in traditional integrated circuits,an improved design of nanoscale memristor is used to realize the adder and multiplier in digital logic circuits.The OR and AND gates of the memristor’s MRL structure are used to design the XOR and XNOR logic gates of the2T-4M structure.A full adder is created by combining these logic gates with CMOS,where the CMOS inverter improves signal drive.By improving the 2T-4M structure,a new 2T-4M logic module is implemented,and a 2-bit binary multiplier is designed based on this module.LTspice simulation ensures that the circuit design is correct.When compared to the previously reported MRL full adder and 2-bit binary multiplier,the full adder significantly reduced the number of components,improved the delay time by 53.3%,and reduced power consumption by 1.93mW.The 2-bit binary multiplier design also has some advantages in terms of total component count,requiring only 18 in total.Finally,a full adder is used to create an encrypted array circuit to encrypt and decrypt the image,proving the circuit’s feasibility in practical application.

关 键 词：忆阻器 CMOS 全加器 乘法器 图像加密 

分 类 号：TN60[电子电信—电路与系统] TN791