基于ZYNQ的通用型卷积神经网络设计与实现  

Hardware Design of General-Purpose Convolutional Neural Network Based on ZYNQ

作　　者：刘晛 吴瑞琦 高尚尚 刘泽浩 刘海波 孔祥晔 王庆 郭乃宏 周锋[1] 王如刚[1] LIU Xian;WU Ruiqi;GAO Shangshang;LIU Zehao;LIU Haibo;KONG Xiangye;WANG Qing;GUO Naihong;ZHOU Feng;WANG Rugang(School of Information Technology,Yancheng Institute of Technology,Yancheng Jiangsu 224051,China;Yancheng XiongYing Precision Machinery Company Limited,Yancheng Jiangsu 224006,China)

机构地区：[1]盐城工学院信息工程学院,江苏盐城224051 [2]盐城雄鹰精密机械有限公司,江苏盐城224006

出　　处：《电子器件》2023年第1期121-125,共5页Chinese Journal of Electron Devices

基　　金：江苏省研究生实践创新计划项目(SJCX21_1517);江苏省高等学校自然科学研究重大项目(19KJA110002);国家自然科学基金项目(61673108);江苏省产学研合作项目(BY2020335,BY2020358);江苏省高校自然科学研究面上项目(20KJB140025);江苏省自然科学基金项目(BK20181050)。

摘　　要：针对基于FPGA平台的神经网络开发周期过长、调节网络模型麻烦等问题,设计了一种基于ZYNQ的通用型卷积神经网络模型。首先通过Tensorflow平台搭建神经网络并训练得到模型各层权重;其次利用高层次综合工具进行卷积层和池化层的IP核设计;然后在ZYNQ平台上部署模型;最后分别运行了Le Net-5和Alex Net-8神经网络进行验证。实验结果表明模型在只损失极少准确度的情况下,卷积与池化运算速度相比于ARM平台分别提高了3.65倍和2.31倍,并具备通用性。A general-purpose convolutional neural network model based on ZYNQ is designed to address the problems of long develop-ment cycles and troublesome adjustment of network models based on FPGA platform.Firstly,the neural network is built and trained on Tensorflow platform to get the weight of each layer of the model.Secondly,the IP cores of the convolutional and pooling layers are de-signed by using the high-level synthesis tool.Then the model is deployed on ZYNQ platform.Finally,the LeNet-5 and AlexNet-8 neural networks are run respectively for verification.The experimental results show that the convolutional and pooling speed are 3.65 and 2.31 times faster respectively than the ARM platform with minimal loss of accuracy,and that the model is generalizable.

关 键 词：卷积神经网络 ZYNQ 高层次综合工具 

分 类 号：TP183[自动化与计算机技术—控制理论与控制工程]