一种高速可配置二维CFAR检测器设计实现  

Design and implementation of a high-speed configurable 2D CFAR detector

作　　者：陶相颖 张多利 刘文娟 倪伟[1,2] 宋宇鲲 TAO Xiangying;ZHANG Duoli;LIU Wenjuan;NI Wei;SONG Yukun(School of Microelectronics,Hefei University of Technology,Hefei 230601,China;IC Design Web-cooperation Research Center of Ministry of Education,Hefei 230601,China)

机构地区：[1]合肥工业大学微电子学院,安徽合肥230601 [2]教育部IC设计网上合作研究中心,安徽合肥230601

出　　处：《合肥工业大学学报（自然科学版）》2023年第5期627-631,677,共6页Journal of Hefei University of Technology：Natural Science

基　　金：国家自然科学基金资助项目(61874156);安徽省高校协同创新资助项目(GXXT-2019-030)。

摘　　要：恒虚警率(constant false alarm rate,CFAR)检测是雷达在干扰背景下检测目标的重要自适应算法。二维CFAR算法随着参考窗口尺寸增大,运算量较大,仅靠软件实现并不能满足较高的实时性需求。文章基于现场可编程门阵列(field programmable gate array,FPGA)设计实现了一种兼容CA-CFAR、GO-CFAR、SO-CFAR和OS-CFAR 4种二维CFAR算法的硬件加速器,同时实现标称化因子、检测器类型、排序值K、参考窗口和保护窗口大小可配置的灵活性,对于256×2048点距离-多谱勒矩阵(Range Doppler Matrix,RDM)数据,4种检测器均可在2.71 ms内完成检测。设计采用全流水结构,具有高实时性。Constant false alarm rate(CFAR)detection is an important adaptive algorithm for radar target detection under interference.With the increase of the reference window size,the two-dimensional(2D)CFAR algorithm has heavier computation.The software implementation alone cannot meet the needs of high real-time performance.Based on field programmable gate array(FPGA),this paper designs and implements a hardware accelerator compatible with four 2D CFAR algorithms:CA-CFAR,GO-CFAR,SO-CFAR and OS-CFAR.At the same time,it realizes the configurable flexibility of nominal factor,detector type,ranking value K,and reference window and protection window sizes.For 256×2048 point Range Doppler Matrix(RDM)data,four detectors can complete the detection within 2.71 ms.The design adopts full pipeline structure and has high real-time performance.

关 键 词：雷达目标检测 二维恒虚警率(CFAR) 滑动窗口 硬件加速 矩形窗 

分 类 号：TN47[电子电信—微电子学与固体电子学]