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作 者:葛一漩 李晨[1] 陈小文[1] 鲁建壮[1] 郭阳[1] GE Yi-xuan;LI Chen;CHEN Xiao-wen;LU Jian-zhuang;GUO Yang(College of Computer Science and Technology,National University of Defense Technology,Changsha 410073,China)
机构地区:[1]国防科技大学计算机学院,湖南长沙410073
出 处:《计算机工程与科学》2023年第6期970-978,共9页Computer Engineering & Science
基 金:国家自然科学基金(62202478);国防科技大学校科研项目(ZK20-04)。
摘 要:设计定制片上网络以满足不同特定应用需求已经成为片上网络设计的发展趋势。定制专用系统一般由各种不同类型的设备组成,将这些设备映射到传统的规则网络拓扑上可能导致较低的性能/开销比。基于精细化设计的定制片上网络成为领域专用系统架构的主流选择。然而,精细化设计也给硬件设计师带来了诸多挑战,传统的手工设计耗费大量时间。因此,探索具有精确化和敏捷化设计特征的定制网络拓扑成为定制片上网络设计的一个重要挑战。为了探索定制片上网络的最佳拓扑结构,设计了一种精确高效的探索算法;同时为了降低时间复杂度,提出了一种启发式线性规划算法HLP,以加快多个网络层之间的遍历速度。与传统的Mesh拓扑结构相比,生成的拓扑结构实现了约20%的性能提升,并将平均跳数减少了约30%。同时,该设计探索算法具有较低的时间复杂度,可以在线性时间复杂度下实现定制片上网络架构的自动生成,具有较高的可扩展性,可应用于大规模片上系统。Designing customized network-on-chip to meet various specific application needs has become the trend of network-on-chip design.Such systems consist of a large number of various types of devices.Mapping these devices into traditional regular network topologies may be able to achieve a lower performance/overhead ratio.Customized on-chip networks become a better choice for domain-specific architecture due to the fine-tuned design feature.However,such fine-tuned design also imposes high burdens on designers which is time-consuming.Therefore,how to explore the optimal custom network topology with agile and fine-tuned design becomes an important challenge for application-specific network-on-chips.In order to explore the optimal topology of customized network-on-chip,an agile and automatic exploration algorithm is designed.In order to reduce the complexity,a heuristic linear programming algorithm is proposed to accelerate the traversing speed between multiple network layers.Compared with the traditional Mesh topology,the generated topology achieves about 20%performance improvement and reduces the average hop count by about 30%within a reasonable time.At the same time,the design exploration algorithm has low time complexity,which can automatically generate customized network on chip architecture under linear time complexity.It has high scalability and can be applied to large-scale system-on-chip.
分 类 号:TP183[自动化与计算机技术—控制理论与控制工程]
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