基于Logisim的时序逻辑电路仿真实验设计  

Design of Timing Logic Circuit Simulation Experiment Based on Logisim

作　　者：侯静云 赵静 骆昱天 Hou Jingyun;Zhao Jing;Luo Yutian(School of Computer Science,HuaiNan Normal UniversityAnHuiHuaiNan232038)

机构地区：[1]淮南师范学院计算机学院,安徽淮南232038

出　　处：《科技风》2023年第25期87-89,共3页

基　　金：安徽省高校优秀青年科研项目“煤炭超细粉碎微观能耗模型研究”(2022AH030143);安徽省级质量工程线上课程“数字电路与系统设计”(2021xskc090);淮南师范学院质量工程项目“物联网应用技术教学团队”(2021hsjxtd01)。

摘　　要：针对目前数字电路实验中存在的费用高、易损坏、扩展难等问题,提出了将Logisim可视化仿真工具应用于实验中的教学方法。本文以计数器为例,从JK触发器入手,借助Logisim仿真工具提供的Wiring、Gates等模块库进行设计和仿真实验。经实践测试,运用Logisim进行电路仿真设计会使繁杂的电路分析设计变得直观、生动,有利于调动学生学习的积极性,增强学生自由设计电路的能力。Aiming at the problems of high cost,easy damage and difficult expansion in digital circuit experiments,a teaching method of applying Logisim visual simulation tool to experiments is proposed.This paper takes the counter as an example,starting from the JK trigger,with the help of the Wiring,Gates and other module libraries provided by the Logisim simulation tool for design and simulation experiments.After practical testing,the use of Logisim for circuit simulation design will make the complicated circuit analysis and design intuitive and vivid,which is conducive to mobilizing students'enthusiasm for learning and enhancing students'ability to design circuits freely.

关 键 词：数字电路 Logisim 实验设计 

分 类 号：G63[文化科学—教育学]