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作 者:傅铮翔 李飞[1] FU Zhengxiang;LI Fei(China Electronics Technology Group Corporation No.58 Research Institute,Wuxi 214035,China)
机构地区:[1]中国电子科技集团公司第五十八研究所,江苏无锡214035
出 处:《电子与封装》2023年第9期17-21,共5页Electronics & Packaging
摘 要:某航天电子系统采用的某型号隔离器电路上电时信号传输异常。针对异常点建立故障分析树,对失效电路中的编码芯片、变压器芯片、低压差线性稳压器(LDO)及解码芯片进行失效点定位。通过内部电路的带隙基准(BGR)、误差放大器输出关键节点扎针测试、ATE上电斜率测试、供电电源上电仿真等手段分析出故障电路因存在制造工艺偏差,BGR在低上电斜率时不能正确建立,进而导致LDO输出异常,该类失效可通过加严ATE测试程序进行有效剔除。针对该问题进行了板级测试验证,为电路改版及同类电路设计提供了依据。When a certain aerospace electronic system uses a certain type of digital isolator circuit,the signal transmission is abnormal when it is powered on.The fault-analysis-tree is established for the abnormal points,and the failure points of the coding chip,transformer chip,low dropout regulator(LDO)and decoding chip in the failure circuit are located.By band-gap reference(BGR)of internal circuit,pin test of error-amplifier output,ATE power on slope test,power supply on simulation and other means,it is found that the fault circuit has manufacturing process deviation,which leads to the BGR cannot be established correctly when the power on slope is low,thus leading to abnormal LDO output.Such failures can be effectively eliminated by tightening ATE test program.The board level test verification is carried out to solve this problem,which provides a basis for the subsequent circuit revision and similar circuit design.
分 类 号:TN406[电子电信—微电子学与固体电子学]
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