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作 者:张淮声 余莉[2] ZHANG Huaisheng;YU Li(Glenfly Technologies INC.,LTD,Shanghai 201203,China;Department of Information Technology,Shanghai Jianqiao College,Shanghai 201306,China)
机构地区:[1]格兰菲智能科技有限公司,上海201203 [2]上海建桥学院信息技术学院,上海201306
出 处:《微电子学与计算机》2023年第10期48-55,共8页Microelectronics & Computer
基 金:上海市“晨光计划”基金项目(AASH1702);上海市教委基金项目(JXGG202064)。
摘 要:针对图形处理芯片(GPU)中的曲面细分单元生成顶点数量过多的问题,提出一种基于三角形邻接关系的几何细分策略,称为TSTESS(Triangle Strip on Tessellation),其主要流程为,把细分块按照从外向内顺序拆分为多个环,对每个环生成多个梯形结构,每个梯形生成大量连续的三角形,通过有限自动机根据三角形的绕向和相邻信息,提取出它们的共有顶点,构成连续的三角形条带并输出.TSTESS方法减少了顶点的生成数量,有利于后期的计算和存储.通过实验测试在各种细分参数的情况下,该方法生成的顶点数量只相当于传统的三角形列表方法的50%~65%左右,可提高细分单元的执行效率,并且易于使用硬件描述代码融入到已有的GPU设计中,便于曲面细分单元输出的三角形条带获得硬件加速.To solve the problem that the number of vertices generated by the Tessellation unit of GPU is too large,we propose a geometric subdivision strategy based on the adjacency relationship of triangles,which is called TSTESS(Triangle Strip on Tessellation).Its main process is to split the subdivision patch into multiple rings from outside to inside,generate multiple trapezoids for each ring,and then generate a large number of continuous triangles for each trapezoid.Based on the winding direction and adjacent information,the finite automata extracts their common vertices to form continuous triangle strips and then output them.TSTESS approach reduces the number of vertices which is conducive to later calculation and storage.Experimental results show that with various subdivision parameters,the number of vertices generated by our method is 50%~65%of that of the traditional method,which can improve the execution efficiency of the Tessellation unit,furthermore,it is easy to use the hardware description codes to integrate into the existing GPU design,so that the triangle strips output by the Tessellation unit could be hardware accelerated.
关 键 词:曲面细分 三角形条带 环 梯形块 顺时针 逆时针
分 类 号:TN402[电子电信—微电子学与固体电子学]
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