基于SystemVerilog的SoC系统控制单元的验证  

Verification of SoC system controller based on SystemVerilog

作　　者：戴兆麟 赵启林 李超 刘璐 DAI Zhaolin;ZHAO Qilin;LI Chao;LIU Lu(School of Electronics and Information Engineering,Shanghai University of Electric Power,Shanghai 201306,China;Shanghai Aiser Education Technology Co.,Ltd.,Shanghai 200120,China)

机构地区：[1]上海电力大学电子与信息工程学院,上海201306 [2]上海爱思尔教育科技有限公司,上海200120

出　　处：《电子设计工程》2023年第23期100-103,共4页Electronic Design Engineering

摘　　要：随着片上系统(System-on-Chip,SoC)成为芯片的主流形式,为协调与控制片上各个IP模块,通常在总线端设有控制单元使系统达到硬件资源配置、面积、功耗的统一,控制单元功能的正确性、完备性变得越来越重要。通过以覆盖率驱动的随机化验证策略、基于SystemVerilog构建分层次的验证平台,对SoC系统的控制单元完成了高效率、高完备率的功能验证,该控制单元的设计符合预期,同时高度模块化的可移植验证平台对同一通信协议下其他SoC控制模块的验证具有参考意义。As System-on-Chip(SoC)becomes the mainstream form of chip,in order to coordinate and control each IP module on the chip,a control unit is provided on the bus side to achieve the unity of hardware resource configuration,area and power consumption,correctness and completeness of the control unit function are becoming more and more significant.Through the coverage-driven randomization verification strategy and the hierarchical verification platform based on SystemVerilog,the control unit of an SoC system has completed the functional verification of high efficiency and high completeness,and the design of the control unit is verified to meet expectations.The highly modular,portable verification platform is also suitable for the verification of other SoC control modules under the same communication protocol.

关 键 词：SOC 系统控制单元 数字验证 SYSTEMVERILOG 覆盖率 

分 类 号：TN402[电子电信—微电子学与固体电子学]