基于比例积分和二分法控制的全数字锁相环研究  

Research on all-digital PLL based on proportional integration and bisection control

作　　者：蒋小军[1] 蒋小伟 Jiang Xiaojun;Jiang Xiaowei(Hunan Railway Vocational and Technical College,Zhuzhou 412001,China)

机构地区：[1]湖南铁道职业技术学院,湖南株洲412001

出　　处：《无线互联科技》2023年第20期141-144,共4页Wireless Internet Technology

基　　金：湖南省教育厅科学研究项目,项目编号:21C1299;湖南铁道职业技术学院校级课题,项目编号:KJ202102。

摘　　要：针对传统锁相环的锁定时间与输出频率范围、滤波器带宽、目标频率和频率分辨率之间的问题,文章提出了一种基于比例积分和二分法控制的快速锁定全数字锁相环。该锁相环根据输入信号和输出信号之间的相位和频率误差信号,通过比例积分和二分法对数控振荡器频率控制字进行调整,从而实现频率的快速锁定。在EDA软件中采用VHDL编程实现该锁相环的设计和仿真,仿真结果表明,该锁相环具有结构简单、锁定时间短、易于集成等特点。To solve the problems between the locking time of traditional PLL and the output frequency range,filter bandwidth,target frequency and frequency resolution,a fast locking all-digital PLL(ADPLL)based on proportional integration(PI)and Bisection control is proposed.According to the phase and frequency error signal between the input signal and the output signal,the frequency control(FCW)of digital control oscillator(DCO)is adjusted by PI control and Bisection,so as to realize the fast frequency locking.The design and simulation of the PLL are realized by VHDL in EDA software.The simulation results show that the PLL has the characteristics of simple structure,short locking time and easy integration,etc.

关 键 词：比例积分 二分法 全数字锁相环 数控振荡器 VHDL 

分 类 号：TP311.1[自动化与计算机技术—计算机软件与理论]