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作 者:于超 秦华[3] 刘楠 丁朋 黄丹飞[1,2] YU Chao;QIN Hua;LIU Nan;DING Peng;HUANG Danfei(School of Opto-Electronic Engineering,Changchun University of Science and Technology,Changchun 130022;Zhongshan Research Institute of Changchun University of Science and Technology,Zhongshan 528400;Suzhou Institute of Nano-tech and Nano-bionics,Chinese Academy of Sciences,Suzhou 215123)
机构地区:[1]长春理工大学光电工程学院,长春130022 [2]长春理工大学中山研究院,中山528400 [3]中国科学院苏州纳米技术与纳米仿生研究所,苏州215213
出 处:《长春理工大学学报(自然科学版)》2023年第6期42-48,共7页Journal of Changchun University of Science and Technology(Natural Science Edition)
基 金:江苏省碳达峰碳中和科技创新专项(BE2022021);苏州市碳达峰碳中和科技支撑重点专项(ST202219)。
摘 要:为实现太赫兹焦平面实时成像及小型电子学相机前期研制,设计了一种基于FPGA和ARM异构架构的太赫兹成像最小控制系统。系统采用赛灵思推出的xc7z020clg400-2芯片作为控制核心,使用基于AlGaN/GaN高电子迁移率晶体管(High-Electron-Mobility Transistor,HEMT)的340 GHz频段的32×32太赫兹探测器阵列,实现了ROIC读出电路时序控制、高速ADS8422控制、数据乒乓缓冲写入DDR并发送至上位机,最终进行软硬件联调。实验结果表明,控制系统能够实现太赫兹全像元、单像元、行和列扫描实时成像,帧频达到47.3 Hz,有效数据传输速率稳定在0.775 Mbit/s,而且FPGA和ARM异构可缩短开发周期、节省资源,使系统灵活性和集成度更高。In order to realize real-time terahertz focal-plane imaging and the early development of small electronic cameras,a terahertz imaging minimum control system based on FPGA and ARM heterogeneous architecture is designed.The xc7z020clg400-2 chip launched by Xilinx is used as the control core.The system uses the 340 GHz frequency 32×32 tera-hertz detector array based on AlGaN/GaN High-Electron-Mobility Transistor(HEMT).Realize the timing control of ROIC readout circuit,high-speed ADS8422 control,data ping-pong buffer writing to DDR and sending to the upper com-puter,and finally carry out the joint debugging of software and hardware.The effective data transmission rate is stable at 0.775 Mbit/s.The experimental results show that the control system can achieve terahertz full pixel,single pixel,row and column scanning real-time imaging,and the frame rate reaches 47.3 Hz.Moreover,the heterogeneity of FPGA and ARM can shorten the development cycle,save resources,and make the system more flexible and integrated.
分 类 号:TN914[电子电信—通信与信息系统]
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