基于FPGA的卷积神经网络语音识别方法  

A convolutional neural network speech recognition method based on FPGA

作　　者：吴宇航 何军[2] WU Yu-hang;HE Jun(School of Electronics and Information Engineering,Nanjing University of Information Science and Technology,Nanjing 210044,China;Artificial Intelligence Academy,Nanjing University of Information Science and Technology,Nanjing 210044,China)

机构地区：[1]南京信息工程大学电子与信息工程学院,南京210044 [2]南京信息工程大学人工智能学院,南京210044

出　　处：《信息技术》2023年第11期22-27,共6页Information Technology

基　　金：国家自然科学基金(61601230)。

摘　　要：近年来,卷积神经网络(CNN)已经广泛应用于语音信号识别。为满足嵌入式应用领域低延时、低功耗、可移动等方面的需求,基于轻量化的卷积神经网络模型,实现了一种应用于现场可编程逻辑门阵列(FPGA)的语音识别系统。通过Vivado中的高层次综合(HLS)设计卷积、池化等计算模块并将CNN算法映射到FPGA上。利用流水线约束和数据定点化等方式,提升语音识别速度。实验结果表明:系统的计算速度相较于ARM处理器实现了36.12倍的加速效果,功耗仅为2.205W,达到了低延时和低功耗的设计要求。In recent years,Convolutional Neural Networks(CNN)have been widely used in audio signal recognition.In order to meet the needs of low latency,low power consumption,and mobility in embedded applications,based on a lightweight CNN model,a audio signal recognition system for Field Programmable Gate Array(FPGA)is implemented.Computing modules such as convolution and pooling are designed through High-Level Synthesis(HLS)in Vivado and map the CNN algorithm to the FPGA.Apart from this,pipeline constraints and data fixed-pointization are used to improve the speed of speech recognition.The experiment results show that the acceleration effect achieves 36.12 times compared with the ARM processor,and the power consumption is only 2.205W,which meets the design requirements of low latency and low power consumption.

关 键 词：语音识别 卷积神经网络 现场可编程逻辑门阵列(FPGA) 高层次综合 

分 类 号：TP274[自动化与计算机技术—检测技术与自动化装置]