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作 者:方志浩 付志凯 王冠[1] 张磊[1] FANG Zhi-hao;FU Zhi-kai;WANG Guan;ZHANG Lei(North China Research Institute of Electro-Optics,Beijing 100015,China)
出 处:《红外》2024年第2期9-17,共9页Infrared
摘 要:随着碲镉汞材料和器件技术的不断发展,满足大视场、超高分辨率应用需求的超大阵列规模的红外探测器逐步投入工程应用,超大面阵探测器芯片的低温可靠性成为封装技术的重点研究内容。以某超大面阵碲镉汞混成芯片为研究对象,采用有限元仿真分析法研究了冷头材料体系、冷台外径、冷台的结构形式等因素对混成芯片低温应力和芯片光敏面低温变形的影响规律,最终优化设计出一套可满足超大面阵芯片低温可靠性要求的冷头结构和材料体系。仿真结果显示,该冷头体系硅电路低温下最大应力约为70 MPa,碲镉汞光敏区在低温下的变形约为30μm。仿真结果能满足工程应用可靠性要求的经验仿真阈值,有效改进了超大面阵红外探测器的高可靠小型化封装技术。With the continuous development of mercury cadmium telluride(MCT)materials and device technology,ultra-large array scale infrared detectors that meet the requirements of a large field-of-view and ultra-high resolution applications are gradually being put into engineering applications.The low-temperature reliability of ultra-large array detector chips has become a key research topic in packaging technology.Taking a certain ultra-large area array HgCdTe hybrid chip as the research object,the finite element simulation analysis method was used to study the influence of factors such as cold head material system,cold head outer diameter,and cold stage structural form on the low-temperature stress and deformation of the chip photosensitive surface of the hybrid chip.Finally,a set of cold head structures and material systems that can meet the low-temperature reliability requirements of the super large area array chips was designed and optimized.The simulation results show that the maximum stress of the silicon circuit in the cold head system at low temperature is about 70 MPa,and the deformation of the mercury cadmium telluride photosensitive region at low temperature is about 30 μm.The simulation results can meet the empirical simulation threshold for engineering application reliability requirements,effectively improving the highly reliability and miniaturized packaging technology of the ultra-large area array infrared detectors.
分 类 号:TN215[电子电信—物理电子学]
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