面向高性能众核处理器的超频DDR4访存结构设计  

Design of over-frequency DDR4 interconnect structure for high-performance many-core processor

作　　者：高剑刚 李川[2] 郑浩[2] 王彦辉[2] 胡晋[2] GAO Jian-gang;LI Chuan;ZHENG Hao;WANG Yan-hui;HU Jin(National Research Center of Parallel Computer Engineering and Technology,Beijing 100190,China;Jiangnan Institute of Computing Technology,Wuxi 214083,China)

机构地区：[1]国家并行计算机工程技术研究中心,北京100190 [2]江南计算技术研究所,江苏无锡214083

出　　处：《计算机工程与设计》2024年第3期715-722,共8页Computer Engineering and Design

基　　金：国家重点研发计划基金项目(2016YFB0200500)。

摘　　要：从高性能众核处理器的多路DDR4嵌入式工程应用出发,设计一种高密度DDR4串推互连结构,提出一种基于不同激励码型的仿真分析方法。采用双面盲孔印制板工艺折叠串推访存结构设计,解决地址组信号概率性出错问题。在压力测试环境下实测读/写信号波形良好,支持信号超频可靠传输,标称2666 Mbps的DDR4存储颗粒可以在3000 Mbps速率下长时间稳定运行。已在神威E级原型机等多台套大型计算装备研发中得到规模化推广应用,产生了良好的技术效益。Considering the embedded engineering application of multi-channel DDR4 for high-performance many-core processor,a high-density DDR4 fly-by interconnect structure was designed,and the analysis method based on different excitation codes was proposed.To realize the optimized folded fly-by structure which could effectively eliminate the potential error fined in simulation,a double-sided blind technology was adopted in printed circuit board process.Interconnect system with such structure,nominal 2666 Mbps DDR4 DRAMS can operate stably at 3000 Mbps data rate,and measured signal waveforms perform well.The structure has been applied on several large computing systems such as Sunway Exascale prototype,and has produced good technical benefits.

关 键 词：双倍数据速率 同步动态随机存取存储器 折叠串推 码型仿真 信号传输 盲孔 超频 

分 类 号：TP303[自动化与计算机技术—计算机系统结构]