大规模芯片内嵌存储器的BIST测试方法研究  

Research on BIST testing method for large-scale chip embedded memory

作　　者：葛云侠 陈龙 解维坤[1,2] 张凯虹 宋国栋 奚留华[3] Ge Yunxia;Chen Long;Xie Weikun;Zhang Kaihong;Song Guodong;Xi Liuhua(Technology Group Corporation No.58 Research Institute,Wuxi 214035,China;School of Automation Engineering,University of Electronic Science and Technology of China,Chengdu 611731,China;Zhongwei Tengxin Electronics Co.Ltd.,Wuxi 214028,China)

机构地区：[1]中国电子科技集团公司第58研究所,无锡214035 [2]电子科技大学自动化学院,成都611731 [3]无锡中微腾芯电子有限公司,无锡214028

出　　处：《国外电子测量技术》2024年第5期18-25,共8页Foreign Electronic Measurement Technology

摘　　要：随着大规模芯片的块存储器(block random access memory,BRAM)数量不断增多,常见的存储器内建自测试(memory build-in-self test,Mbist)方法存在故障覆盖率低、灵活性差等问题。为此,提出了一种新的基于可编程有限状态机的Mbist方法,通过3个计数器驱动的可编程Mbist控制模块和算法模块集成8种测试算法,提高故障覆盖率和灵活性。采用Verilog语言设计了所提出的Mbist电路,通过Modelsim对1 Kbit×36的BRAM进行仿真并在自动化测试系统上进行了实际测试。实验结果表明,该方法对BRAM进行测试能够准确定位故障位置,故障的检测率提高了15.625%,测试效率提高了26.1%,灵活性差的问题也得到了很大改善。With the increasing number of block random access memory(BRAM)in large-scale chip,common memory built-in self-test(Mbist)methods have some problems such as low fault coverage,poor flexibility etc.Therefore,in this paper a new Mbist method based on programmable finite state machine is proposed.The method is to integrate eight test algorithms through three counter-driven programmable Mbist control modules and algorithm modules to improve fault coverage and flexibility.The proposed Mbist circuit is designed in Verilog language,and the 1 Kbit×36 BRAM is simulated by Modelsim,and conducted actual testing on an automated testing system.The experimental results show that the method can accurately locate the fault location when testing the BRAM,the fault detection rate is increased by 15.625%,the test efficiency has been improved by 26.1%and the problems of poor flexibility are also greatly improved.

关 键 词：大规模芯片 块存储器 存储器内建自测试 可编程存储器内建自测试控制器 故障覆盖率 

分 类 号：TN4[电子电信—微电子学与固体电子学]