基于动态可重构结构的卷积数据复用优化设计  

Optimal design of convolutional data reuse based on dynamically reconfigurable structures

作　　者：宋佳 蒋林 朱育琳 朱家扬 SONG Jia;JIANG Lin;ZHU Yulin;ZHU Jiayang(College of Electrical and Control Engineering,Xi’an University of Science and Technology,Xi’an 710600,China)

机构地区：[1]西安科技大学电气与控制工程学院,陕西西安710600

出　　处：《传感器与微系统》2024年第6期105-108,共4页Transducer and Microsystem Technologies

基　　金：国家自然科学基金重点资助项目(61834005/F0402)。

摘　　要：针对卷积神经网络(CNN)计算效率低、速度慢、硬件资源消耗大等问题,提出了基于动态可重构结构的卷积数据复用优化设计方案。利用可重构阵列邻接互连寄存器实现输入特征图数据和权值数据的复用,提高内存访问效率,采用层间多通道并行计算对神经网络卷积运算进行加速。经在AlexNet上测试,论文提出的数据复用策略使得卷积运算乘累加操作最高可减少44.05%。在Zynq—7000开发板上实现本文提出的优化方案。结果表明:相比于现有的基于现场可编程门阵列(FPGA)实现AlexNet的计算,本实验LUTs资源消耗减少12.86%、FF资源消耗减少约97.5%、DSP资源消耗减少约66.7%。Aiming at the problems of low computational efficiency,slow speed and high consumption of hardware resources of convolutional neural network(CNN),an optimal design scheme of convolutional data multiplexing based on dynamic reconfigurable structure is proposed.The reconfigurable array critical interconnect registers are used to implement data multiplexing of input feature map data and weight data to improve memory access efficiency,and uses inter-layer multi-channel parallel computing to accelerate the convolutional computation of the neural network.Tested on the AlexNet,the proposed data multiplexing strategy can reduce the convolutional computation by up to 44.05%.The proposed optimization scheme is implemented on a Zynq-7000 development board.Results show that this experiment consumes 12.86%less LUTs resources,approximately 97.5%less FF resources and approximately 66.7%less DSP resources than existing field programmable gate array(FPGA)-based implementations of AlexNet computations.

关 键 词：卷积神经网络 并行计算 数据复用 

分 类 号：TP183[自动化与计算机技术—控制理论与控制工程]