基于奈奎斯特采样的FPGA异步串行通信接口设计  

Design of FPGA Asynchronous Serial Communication Interface Based on Nyquist Sampling

作　　者：陈伟 蒲红平 杨仕勇 张淑慧 CHEN Wei;PU Hongping;YANG Shiyong;ZHANG Shuhui(School of Automation and Information Engineering,Sichuan University of Science&Engineering,Yibin 644000,China;Artificial Intelligence Key Laboratory of Sichuan Province,Yibin 643000,China)

机构地区：[1]四川轻化工大学自动化与信息工程学院,四川宜宾644000 [2]人工智能四川省重点实验室,四川宜宾643000

出　　处：《现代信息科技》2024年第9期24-28,33,共6页Modern Information Technology

基　　金：人工智能四川省重点实验室(2020RZY01,2021RYY05);厅市共建智能终端四川省重点实验室(SCITLAB-20011)。

摘　　要：在异步串行通信中,由于串行接口硬件设备的工作频率限制,以及信号跳变引起的抖动、环境干扰等影响,采用传统方法实现异步串行通信的通信接口无法可靠地完成高速率通信。文章采用VHDL语言,设计一种基于奈奎斯特的异步串行通信接口,包括数据接收、数据发送和2倍波特率的采样时钟三个模块。ISE和ModelSim联合仿真与实际工程的验证表明,使用新方法设计的接口在5 Mbit/s的高速率下,系统可稳定、可靠地与外部设备进行数字通信。In asynchronous serial communication,due to the frequency limitations of serial interface hardware devices,as well as the effects of signal jitter and environmental interference caused by signal jumps,communication interface that it uses traditional methods for implementing asynchronous serial communication cannot reliably complete high-speed communication.It uses VHDL language to design an asynchronous serial communication interface based on Nyquist,which includes three modules:data reception,data transmission,and a sampling clock with a 2x baud rate.The joint simulation of ISE and ModelSim and practical engineering verification show that the interface designed using the new method can make system digital communicate with external devices stably and reliably at a high speed of 5 Mbit/s.

关 键 词：奈奎斯特采样 FPGA VHDL 异步串行通信 

分 类 号：TN911.72[电子电信—通信与信息系统]