集成硅基转接板的PDN供电分析  

Analysis of PDN Power Supply for Integrated Silicon-Based Interposers

作　　者：何慧敏[1] 廖成意 刘丰满[1,2] 戴风伟 曹睿[1,2] HE Huimin;LIAO Chengyi;LIU Fengman;DAI Fengwei;CAO Rui(Institute of Microelectronics,Chinese Academy of Sciences,Beijing 100029,China;National Center and Advanced Packaging Co.,Ltd.,Wuxi 214135,China)

机构地区：[1]中国科学院微电子研究所,北京100029 [2]华进半导体封装先导技术研发中心有限公司,江苏无锡214135

出　　处：《电子与封装》2024年第6期69-80,共12页Electronics & Packaging

基　　金：基于单光子成像的高集成感存算一体芯片研发与示范应用(Z221100007722028)。

摘　　要：集成硅转接板的2.5D/3D封装是实现Chiplet技术的重要封装方案。总结了传统电源分配网络(PDN)的供电机理,分析了先进封装下PDN存在的直流压降过大、路径电阻大等电源完整性问题,介绍了针对硅基转接板上PDN的等效电路建模方法,重点概述了2.5D/3D封装下PDN的建模与优化。通过将整块的大尺寸硅桥拆分为多个小硅桥、硅桥集成硅通孔(TSV)、增加TSV数量等方式减少电源噪声。最后,对比采用不同集成方案的DC-DC电源管理模块的PDN性能,结果表明,片上集成方案在交流阻抗、电源噪声以及直流压降等指标上都优于传统的基板集成方案,是3D Chiplet中具有潜力的供电方案。2.5D/3D packaging with integrated silicon-based interposers is an important packaging solution to enable Chiplet technology.The power supply mechanism of traditional power delivery network(PDN)is summarized,power integrity problems such as excessive DC voltage drop and high path resistance of PDN in advanced packages are analyzed,and equivalent circuit modelling methods for PDN on silicon-based interposers are introduced,with a focus on outlining the modelling and optimization of PDN in 2.5D/3D packages.Power supply noise is reduced by splitting the entire large-area silicon bridge into multiple small silicon bridges,integrating silicon bridges with through silicon vias(TSVs),and increasing the number of TSVs.Finally,comparing the PDN performance of DC-DC power management modules using different integration schemes.The results show that the on-chip integration scheme outperforms the traditional substrate integration scheme in terms of AC impedance,power supply noise,and DC voltage drop,making it a promising power supply solution for 3D Chiplet.

关 键 词：2.5D/3D封装 芯粒 电源分配网络 硅通孔 

分 类 号：TN305.94[电子电信—物理电子学]