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作 者:张涛[1] 邱云飞 刘劲[1] ZHANG Tao;QIU Yunfei;LIU Jin(School of Information Science and Engineering,Wuhan University of Science and Technology,Wuhan 430081,China)
机构地区:[1]武汉科技大学信息科学与工程学院,湖北武汉430081
出 处:《湖南大学学报(自然科学版)》2024年第6期178-186,共9页Journal of Hunan University:Natural Sciences
基 金:国家自然科学基金资助项目(61873196)。
摘 要:基准电压对模拟系统的性能与精度有着至关重要的影响.一般的曲率补偿仅能消除与温度相关的二阶项,难以满足某些电路对高精度的要求.现有的电路存在温度系数较高的问题,亟须对更高阶进行补偿.本文提出了一种新的高阶曲率补偿方法,通过利用CMOS晶体管亚阈值特性设计,成功实现了一种低温度系数电压基准电路.该方法首先利用两个不同温度系数的电流流过相同的亚阈值区CMOS晶体管,产生两个具有不同温度特性的栅源电压.然后,通过对这两个不同温度特性的栅源电压进行相减,产生对数电压,并与一阶补偿电压进行加权叠加,从而实现高阶补偿.为了提高电源抑制比(PSRR),该电路采用了高增益负反馈回路,避免了传统电压基准电路中放大器的使用,进一步地降低了功耗.本设计基于0.18μm CMOS工艺,在Cadence软件下完成电路设计、版图设计与仿真验证.仿真结果显示,该电路正常工作电压范围为1.6~3 V,在2 V的工作电压下,基准电压输出295 mV,在-45~125℃范围内温度系数为1.26 ppm/℃,PSRR为51.1 dB@1 kHz,最大静态电流为8.9μA.结果表明,该基准电压电路能够满足高精度集成电路系统的需求.Voltage reference plays a crucial role in influencing the performance and accuracy of analog systems.General curvature compensation techniques focus solely on eliminating second-order temperature-related terms,making it hard to meet the high precision requirements of certain circuits.The existing circuit has a high-temperature coefficient issue that requires urgent compensation for higher-order terms.This paper proposes a novel high-order curvature compensation method,successfully implementing a low-temperature coefficient voltage reference circuit by leveraging the subthreshold characteristics of CMOS transistors.Initially,two currents with different temperature coefficients flow through the same subthreshold CMOS transistor,generating two gate-source voltages with unique temperature characteristics.Subsequently,the subtraction of these voltages produces a logarithmic voltage,and the logarithmic voltage is weighted and superimposed with the first-order compensation voltage to realize the high-order compensation.To enhance the power supply rejection ratio(PSRR),the circuit employs a high-gain negative feedback loop,eliminating the need for an amplifier in traditional voltage reference circuits and further reducing power consumption.This design is based on the 0.18µm CMOS process and is implemented using Cadence software for circuit design,layout,and simulation verification.Simulation results indicate that the circuit operates within a normal voltage range of 1.6 V~3 V,with a reference voltage output of 295 mV at 2 V operating voltage.The temperature coefficient within the range of-45℃to 125℃is 1.26 ppm/℃,and the PSRR is 51.1 dB@1 kHz,with a maximum static current of 8.9µA.These results show that the voltage reference circuit can meet the needs of high-precision integrated circuit systems.
分 类 号:TN402[电子电信—微电子学与固体电子学]
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