高速数字电路布局与布线优化算法分析  

Analysis of Layout and Wiring Optimisation Algorithms for High-speed Digital Circuits

作　　者：杨保书 马晓锋 徐尚军 马选林 YANG Baoshu;MA Xiaofeng;XU Shangjun;MA Xuanlin(Tianshui 749 Electronics Co.,Ltd.,Gansu 741000,China)

机构地区：[1]天水七四九电子有限公司,甘肃741000

出　　处：《集成电路应用》2024年第5期114-115,共2页Application of IC

摘　　要：阐述一种综合考虑高速数字电路布局和布线的优化算法,该算法基于先进的启发式搜索技术,采用创新的优化策略。实验结果表明,在减小信号传输延迟的同时,能够显著降低功耗和减小布局面积。This paper describes an optimization algorithm that comprehensively considers the layout and routing of high-speed digital circuits.The algorithm is based on advanced heuristic search techniques and adopts innovative optimization strategies.The experimental results show that while reducing signal transmission delay,it can significantly reduce power consumption and layout area.

关 键 词：高速数字电路 布局布线 优化算法 信号传输延迟 

分 类 号：TN402[电子电信—微电子学与固体电子学]