基于硬件逻辑语言的时钟模块设计研究  

Clock Module Design Research Based on Hardware Logic Language

作　　者：黄思凝 唐端端 王颖[1] HUANG Sining;TANG Duanduan;WANG Ying(City College,Dalian University of Technology,Dalian 116600,Liaoning,China)

机构地区：[1]大连理工大学城市学院,辽宁大连116600

出　　处：《流体测量与控制》2024年第3期40-43,共4页Fluid Measurement & Control

基　　金：辽宁省大学生创新创业训练计划项目“基于物联网云的智能化老年公寓健康监测系统”(S202213198002)。

摘　　要：随着信息化与数字化的不断推进,嵌入式系统已经广泛应用于生活的各个方面。硬件描述语言被称为快速集成电路程序硬件描述语言,是一种专门用于描述和模拟数字电路系统性能的硬件描述语言。在20世纪90年代,VHDL设计技术的出现彻底改变了数字系统的设计方式,带来了革命性的变革。VHDL的使用范围广泛,可应用于各种高速集成电路设计。With the continuous advancement of information and digitalization,embedded system has been widely used in all aspects of life.Hardware description language is called the fast integrated circuit program hardware description language,which is a hardware description language dedicated to describe and simulate the performance of the digital circuit system.In the 1990s,the emergence of VHDL has completely changed the design technology of digital systems and brought revolutionary changes.VHDL is widely used and can be applied in various high-speed integrated circuit designs.

关 键 词：硬件描述语言 VHDL QuartusⅡ 

分 类 号：TN40[电子电信—微电子学与固体电子学]