应用于FeRAM设计的铁电电容宏模型  

A Physical Based Ferroelectric Capacitor Compact Model for FeRAM Simulation

作　　者：王浩[1] 郭术明 吴超 WANG Hao;GUO Shu-ming;WU Chao(China Resources Microelectronics Holdings Limited)

机构地区：[1]华润微电子控股有限公司

出　　处：《中国集成电路》2024年第7期37-44,共8页China lntegrated Circuit

摘　　要：本文结合实际铁电存储器的基本电路单元和读写原理,基于Preisach理论和铁电电畴矫顽电压概率密度函数一维分布近似提出了用于电路仿真的铁电电容宏模型。模型采用与spice兼容的Verilog-A语言实现,能够准确描述铁电电容的非饱和滞回特性,以及电压任意变化时的铁电电容变化。模型仿真结果与实验数据符合良好,可为铁电存储器(FeRAM)设计提供可靠的参考。This paper proposes a ferroelectric capacitor compact model for circuit simulation based on Preisach theory and the one-dimensional distribution approximation of ferroelectric coercive voltage probability density function.The model is implemented in Verilog-A language,which is compatible with SPICE,and accurately describes the unsaturated hysteresis characteristics of ferroelectric capacitors,as well as their capacitance variation under arbitrary voltage changes.The modular design of the model ensures good scalability.Simulation results agree well with experimental data,making it a reliable reference for designing ferroelectric memories(FeRAM).

关 键 词：铁电存储器 铁电电容 宏模型 Preisach理论 

分 类 号：TP333[自动化与计算机技术—计算机系统结构]