基于JESD204B接口的波形产生FPGA设计  

FPGA design for waveform generation based on JESD204B interface

作　　者：付然 孙晨阳 刘芳 杜思航 马瑞山 Fu Ran;Sun Chenyang;Liu Fang;Du Sihang;Ma Ruishan(The 58th Institute of China Electronics Technology Corporation,Wuxi 210000,China)

机构地区：[1]中国电子科技集团公司第五十八研究所,江苏无锡210000

出　　处：《电子技术应用》2024年第7期103-106,共4页Application of Electronic Technique

摘　　要：提出了一种基于JESD204B接口的波形产生的FPGA设计方案,该设计主要由FPGA、DAC、DDR3以及网口芯片组成,实现产生双通道、频率范围为2 GHz~3.5 GHz的中频信号。FPGA与DAC由高速串行接口JESD204B进行连接,实现双通道的波形产生、数字上变频及数模转换,网口芯片与DDR3用于传输和存储一些特殊数字波形。详细介绍了JESD204B接口时钟同步、DDS信号发生器、数字波形接收、缓存和发送等关键功能的设计。最后通过频谱分析仪抓捕DAC输出的中频信号验证了FPGA设计的可靠性。An FPGA design for waveform generation based on JESD204B interface is introduced.This design mainly consists of FPGA,DAC,DDR3 and network chips,and realizes the generation of intermediate frequency signals with dual channel frequency range of 2 GHz to 3.5 GHz.FPGA and DAC are linked through high-speed serial interface JESD204B,realizing waveform generation,digital up-conversion and analog conversion,network chips and DDR3 are used for transmitting and storing special waveforms.The article provides a detailed introduction to key technologies such as JESD204B interface clock synchronization design,DDS signal generator,digital waveform reception,storage,and transmission.Finally,the reliability of the FPGA design is verified by the intermediate frequency signal captured by the DAC output through a spectrum analyzer.

关 键 词：JESD204B 高速串行传输 UDP协议 RGMII接口 

分 类 号：TN710[电子电信—电路与系统]