单元感知测试的优化方案  

Optimized solutions for cell aware testing

作　　者：李锦明[1] 刘洁 LI Jinming;LIU Jie(School of Semiconductors and Physics,North University of China,Taiyuan 030051,China)

机构地区：[1]中北大学半导体与物理学院,山西太原030051

出　　处：《微电子学与计算机》2024年第8期109-114,共6页Microelectronics & Computer

基　　金：装发基础研究项目(514010504-308)。

摘　　要：越来越多的半导体公司采用新型故障模型——单元感知测试(Cell Aware Test,CAT)来提高库单元内部覆盖率和低缺陷率,但CAT在自动测试向量生成(Auto Test Pattern Generation,ATPG)过程中使用的测试向量数量多,运行时间长,显著地增加测试成本。为了优化CAT,在ATPG流程中加入了总临界区域(Total Critical Area,TCA)和合并时钟域命名捕获过程(Named Capture Procedure,NCP)方法。TCA根据故障类型和最有可能出现故障的位置进行排序,合并时钟域NCP方法为被测知识产权(Intellectual Property,IP)管理时钟域、控制时钟、定义捕获方案。结果表明,结合TCA和合并时钟域NCP方法的CAT达到了提高覆盖率、降低测试向量数量、减少运行时间的优化目标。与以往的CAT优化研究相比,结合了TCA和合并时钟域NCP的CAT优化流程在优化覆盖率和测试向量方面达到了更好的效果。More and more semiconductor companies are adopting a new fault model,the Cell Aware Test(CAT),to improve coverage and low defect rates within library cells.However,CAT uses a large number of Test vectors in the process of Auto Test Pattern Generation(ATPG),and the running time is long,which significantly increases the test cost.In order to optimize CAT,Total Critical Area(TCA)and Named Capture Procedure(NCP)methods are added to the ATPG process,where TCA is sorted according to the type of fault and the most likely location of the fault,and the NCP method is used for the Intellectual Property(IP)under test.IP manages the clock domain,controls the clock,and defines the capture scheme for the IP under test.The results show that CAT combining TCA and the combined clock domain NCP approach achieves the optimization goals of increasing coverage,reducing the number of test vectors,and decreasing runtime.Compared with previous CAT optimization studies,the CAT optimization flow combining TCA and combined clock domain NCP achieves better results in optimizing coverage and test vectors.

关 键 词：细胞感知测试 可测试性设计 合并时钟域 总临界区域 

分 类 号：TN47[电子电信—微电子学与固体电子学]