基于UVM的片上网络路由器验证平台  

Verification Platform for On-chip-network Router Based on UVM

作　　者：王鑫[1] 翟周伟 WANG Xin;ZHAI Zhouwei(School of Internet of Things Engineering,Jiangnan University,Wuxi 214222,China)

机构地区：[1]江南大学物联网工程学院,江苏无锡214222

出　　处：《计算机测量与控制》2024年第10期201-207,共7页Computer Measurement &Control

基　　金：高等学校学科创新引智计划项目(B23008);未来网络科研基金项目(FNSRFP2021YB11)。

摘　　要：路由器是片上网络的关键组件,其性能对于整个网络的性能具有重要影响;针对片上网络路由器进行功能验证,采用SystemVerilog和自动化脚本搭建了基于通用验证方法学(UVM)的验证平台,简化了验证流程;在验证平台中,通过划分多个agent向路由器的每个端口发送受约束的随机激励和定向测试序列,并创建了多个独立的测试用例,对路由器的功能进行充分的验证;通过运用覆盖率驱动策略,对验证进程进行了量化;根据路由器的设计要求,编写了覆盖组和交叉覆盖组以收集覆盖率数据;此验证平台已应用于人工智能芯片的验证工作,平台中的组件和测试用例均可实现更高层次的复用;此外,通过VCS和Verdi的联合仿真,实现了100%的功能覆盖率和95.6%的代码覆盖率的目标。A router is a key component of on-chip network,and its performance has an important impact on the performance of whole network.For the functional verification of the on-chip-network router,a verification platform based on the universal verification methodology(UVM)is constructed by using the SystemVerilog and automation scripts,simplifying the verification process.In the verification platform,the router s functionality is adequately verified,which sends the constrained random excitation and directional testing sequence to each port of the router by dividing multiple agents,and multiple independent test cases are built to fully verify the functionality of the router.Verification process is quantified by applying the coverage-driven strategies.According to the design requirements of the router,coverage groups and cross-coverage groups are written to collect the coverage data.This verification platform is already applied in the verification of AI chips,and the components and test cases in the platform can be achieved the reuse at a higher level.In addition,the system achieves the goal of 100%functional coverage and 95.6%code coverage through the joint simulation of VCS and Verdi.

关 键 词：片上网络路由器 验证平台 覆盖率 SYSTEMVERILOG 人工智能芯片 

分 类 号：TP391.9[自动化与计算机技术—计算机应用技术]