两种面向宇航应用的高可靠性抗辐射加固技术静态随机存储器单元  

Two Highly Reliable Radiation Hardened By Design Static Random Access Memory Cells for Aerospace Applications

作　　者：闫爱斌 李坤 黄正峰 倪天明 徐辉[3] YAN Aibin;LI Kun;HUANG Zhengfeng;NI Tianming;XU Hui(School of Microelectronics,Hefei University of Technology,Hefei 230601,China;School of Integrated Circuit,Anhui University of Engineering,Wuhu 241000,China;School of Computer Science and Engineering,Anhui University of Science and Technology,Huainan 232001,China)

机构地区：[1]合肥工业大学微电子学院,合肥230601 [2]安徽工程大学集成电路学院,芜湖241000 [3]安徽理工大学计算机科学与工程学院,淮南232001

出　　处：《电子与信息学报》2024年第10期4072-4080,共9页Journal of Electronics & Information Technology

基　　金：国家自然科学基金(61974001)。

摘　　要：CMOS尺寸的大幅缩小引发电路可靠性问题。该文介绍了两种高可靠的基于设计的抗辐射加固(RHBD)10T和12T抗辐射加固技术(SRAM)单元,它们可以防护单节点翻转(SNU)和双节点翻转(DNU)。10T单元主要由两个交叉耦合的输入分离反相器组成,该单元可以通过其内部节点之间的反馈机制稳定地保持存储的值。由于仅使用少量晶体管,因此其在面积和功耗方面开销也较低。基于10T单元,提出了使用4个并行存取访问管的12T单元。与10T单元相比,12T单元的读/写访问时间更短,且具有相同的容错能力。仿真结果表明,所提单元可以从任意SNU和部分DNU中恢复。此外,与先进的加固SRAM单元相比,所提RHBD 12T单元平均可以节省16.8%的写访问时间、56.4%的读访问时间和10.2%的功耗,而平均牺牲了5.32%的硅面积。Aggressive scaling of CMOS technologies can cause the reliability issues of circuits.Two highly reliable Radiation Hardened By Design(RHBD)10T and 12T Static Random-Access Memory(SRAM)cells are presented in this paper,which can protect against Single Node Upsets(SNUs)and Double Node Upsets(DNUs).The 10T cell mainly consists of two cross-coupled input-split inverters and the cell can robustly keep stored values through a feedback mechanism among its internal nodes.It also has a low cost in terms of area and power consumption,since it uses only a few transistors.Based on the 10T cell,a 12T cell is proposed that uses four parallel access transistors.The 12T cell has a reduced read/write access time with the same soft error tolerance when compared to the 10T cell.Simulation results demonstrate that the proposed cells can recover from SNUs and a part of DNUs.Moreover,compared with the state-of-the-art hardened SRAM cells,the proposed RHBD 12T cell can save 16.8%write access time,56.4%read access time,and 10.2%power dissipation at the cost of 5.32%silicon area on average.

关 键 词：CMOS 静态随机存储器单元 抗辐射加固 单节点翻转 双节点翻转 

分 类 号：TN43[电子电信—微电子学与固体电子学]