硅基结势垒肖特基二极管仿真设计  

Simulation Design of Silicon-Based Junction Barrier Schottky Diode

作　　者：王卉如 贾文博 任向阳 张治国[1] 李永清[1] 刘宏伟[1] 何方[1] 祝永峰[1] 李颖[1] 钱薪竹 WANG Huiru;JIA Wenbo;REN Xiangyang;ZHANG Zhiguo;LI Yongqing;LIU Hongwei;HE Fang;ZHU Yongfeng;LI Ying;QIAN Xinzhu(Shenyang Academy of Instrumentation Science Co.,Ltd.,Shenyang 110043,China)

机构地区：[1]沈阳仪表科学研究院有限公司,沈阳110043

出　　处：《微处理机》2024年第5期17-19,共3页Microprocessors

摘　　要：为实现硅基结势垒控制肖特基(JBS)二极管低反向漏电流和高击穿电压的双重目标,使用TCAD软件建立耐压值为60 V的JBS二极管仿真模型。通过研究其正向导通状态和反向截止状态的工作原理,模拟施加电压观察内部电场分布情况,仿真不同P+区间隔距离对反向漏电流和耐压能力的影响。通过分析JBS二极管的仿真结果,可选择合适的P+区间隔距离,以优化硅基JBS二极管的性能,降低反向漏电流并提高耐压能力,对于JBS功率半导体器件参数优化具有重要意义。To achieve the dual objectives of low reverse leakage current and high breakdown voltage in silicon-based junction barrier Schottky diodes,a simulation model of a 60 V JBS diode is established using TCAD software.By studying its working principles in forward conduction and reverse blocking states,the internal electric field distribution is observed by simulating applied voltages.The effects of different P+region spacing on reverse leakage current and voltage withstand capability are simulated.Through analysis of the JBS diode simulation results,an appropriate P+region spacing can be selected to optimize the performance of silicon-based JBS diodes,reducing reverse leakage current and improving voltage withstand capability,which has significant implications for parameter optimization of JBS power semicon-ductor devices.

关 键 词：JBS二极管 P+区间距 反向漏电流 耐压能力 

分 类 号：TN311.7[电子电信—物理电子学]