基于单粒子效应的SRAM在线检错电路设计与实现  

Design and realization of SRAM online error detection circuit based on Single Event Effects

作　　者：白创 周伟 BAI Chuang;ZHOU Wei(School of Physics and Electronic Science,Changsha University of Science and Technology,Changsha 410114,China)

机构地区：[1]长沙理工大学物理与电子科学学院,湖南长沙410114

出　　处：《电子设计工程》2025年第4期25-29,35,共6页Electronic Design Engineering

基　　金：国家自然科学基金(61604020);湖南省教育厅科研项目-优秀青年项目(22B0287)。

摘　　要：针对单粒子效应引起的航天器SRAM数据错误问题,提出一种基于错误检查纠正(ECC)与完整性检测器相结合的系统级SRAM在线检测错误电路。ECC采用(39,32)汉明码设计,实现数据被访问时自动纠正易发性的单比特错误。完整性检测器基于哈希算法进行主动循环检测设计,在ECC检查的基础上,实现对数据的周期性检查,有效防止ECC错检错纠。基于CMOS 0.18μm工艺实现在线检错电路。仿真结果表明,该电路在读写内存数据的情况下能够修复1 bit错误,并能检测出多位错误,极大地提高了SRAM的抗SEU性能。A system-level SRAM on-line error detection circuit based on the combination of Error Check Correction(ECC)and integrity detector is proposed for the spacecraft SRAM data error problem caused by the Single Evendt Effects.The ECC employs a(39,32)Hamming code design,facilitating automatic correction of volatile single-bit errors during data access.The integrity detector,employing a hash algorithm,is designed for active cyclic detection,complementing ECC checking to perform cyclic data verification and effectively preventing ECC misdetection and error correction.The in-circuit error detection circuit is implemented using a CMOS 0.18μm process.Simulation results demonstrate the circuit’s capability to correct 1 bit errors and detect multi-bit errors during memory data read and write operations,significantly enhancing SRAM’s resistance to Single-Event Upsets(SEUs).

关 键 词：单粒子效应 SRAM 系统级 在线检测错误 

分 类 号：TN40[电子电信—微电子学与固体电子学]