输出端电容ESR对准LDO输出的影响分析  

Analysis of the Effect of Output Terminal Capacitor ESR Alignment on LDO Output

作　　者：张虎 刘嘉敏 王苗苗 ZHANG Hu;LIU Jiamin;WANG Miaomiao(Tianshui Huatian Electronics Group,Gansu 741001,China)

机构地区：[1]天水华天电子集团,甘肃741001

出　　处：《集成电路应用》2024年第10期10-12,共3页Application of IC

摘　　要：阐述从理论上推导了准LDO的主要零极点位置,并对其传统的ESR零点补偿方法进行分析。结果表明,采用ESR零点补偿时,需要注意其使用范围和输出电容的选择,ESR过高或者过低都会带来输出的不稳定。This paper describes the main zero pole positions of quasi-LDO are deduced theoretically,and the traditional ESR zero compensation method.The results show that when ESR zero compensation is adopted,it is necessary to pay attention to the selection of its application range and output capacitance,and too high or too low ESR will bring the output instability.

关 键 词：电路设计 ESR LDO环路稳定性 线性稳压器 

分 类 号：TN402[电子电信—微电子学与固体电子学] TN721