总线功能模型在集成电路功能设计验证中的应用  

Application of Bus Function Model in Integrated Circuit Design and Function Verification

作　　者：陈阜东 CHEN Fudong(Shanghai Xipeng Microelectronics Co.,Ltd.,Shanghai 200082,China)

机构地区：[1]上海矽朋微电子有限公司,上海200082

出　　处：《集成电路应用》2024年第11期1-3,共3页Application of IC

摘　　要：阐述随着集成电路设计规模不断增大,功能验证已经成为重点工作。提升集成电路功能验证的合理性,应结合总线功能模型设计和应用优势展开探索。为此,介绍总线功能模型、集成电路功能验证过程。探讨集成电路功能验证中总线功能模型的设计和应用,包括总线功能模型结构设计、总线功能模型组织和调用。This paper expounds that as the scale of integrated circuit design continues to increase,functional verification has become a key task.It enhances the rationality of integrated circuit functional verification and should be explored in combination with the design and application advantages of bus functional models.It introduces the bus function model and integrated circuit function verification process.It explores the design and application of bus function models in integrated circuit functional verification,including bus function model structure design,bus function model organization and invocation.

关 键 词：集成电路 总线功能模型 功能验证 电路设计 

分 类 号：TN402[电子电信—微电子学与固体电子学]