基于故障监控的CPU测试平台设计  

Test Platform Design of CPU Based on Fault Monitoring

作　　者：刘宏琨 王志立 王一伟 张凯虹 奚留华 LIU Hongkun;WANG Zhili;WANG Yiwei;ZHANG Kaihong;XI Liuhua(Wuxi CMC Electronics Co.,Ltd.,Wuxi 214072,China)

机构地区：[1]无锡中微腾芯电子有限公司,江苏无锡214072

出　　处：《电子与封装》2025年第2期25-29,共5页Electronics & Packaging

摘　　要：通过ATE结合实装系统实现了CPU芯片测试。基于回环测试技术实现CPU芯片的PCIe和UART接口测试,通过外挂Flash芯片实现CPU芯片SPI接口的读写性能测试、擦除测试、数据保持测试,通过外挂DDR4芯片实现CPU芯片的内存延迟、时间参数测试。通过设计实装系统故障诊断定位装置并外挂EEPROM芯片实现CPU芯片测试温度实时监控,提高了测试效率。The CPU chip testing is realized through ATE combined with the actual system.The PCIe and UART interfaces of the CPU chip are tested based on the loopback test technology.The external Flash chips are used to realize read/write performance testing,erase testing and data retention testing of the SPI interfaces of the CPU chip.The external DDR4 chips are used to test the memory delay and time parameters of the CPU chip.The fault diagnosis and location device of the actual system is designed,and the EEPROM chips are attached to realize the real-time monitoring of the test temperature of the CPU chip,which improves the test efficiency.

关 键 词：ATE测试 实装测试 测试板设计 故障诊断 

分 类 号：TN407[电子电信—微电子学与固体电子学]