沟槽栅IGBT制备中的翘曲控制  

Warpage Control in the Preparation of Trench Gate IGBT

作　　者：夏碧波 蔡乐 张鸿鑫 魏宏杰 彭新华 谭灿健 Xia Bibo;Cai Le;Zhang Hongxin;Wei Hongjie;Peng Xinhua;Tan Canjian(Zhuzhou CRRC Times Semiconductor Co.,Lid.,Zhuzhou 412000,China)

机构地区：[1]株洲中车时代半导体有限公司,湖南株洲412000

出　　处：《半导体技术》2025年第3期259-264,共6页Semiconductor Technology

摘　　要：沟槽栅IGBT是提高功率器件功率密度和性能的主流发展方向。但随着芯片精细化程度的提升,制备过程产生的晶圆翘曲更大,更容易影响其工艺过程和工艺效果,因此芯片制备过程中的翘曲控制成为了新的关注点。系统分析了沟槽栅IGBT制备流程中翘曲的产生原因,从单项工艺制备条件、新型多晶硅/氧化层厚度的沟槽结构和背面膜层的去除站点流程三个方面提出了优化方案。通过整合各种优化方法,IGBT晶圆的翘曲从±120μm降低至±70μm以内,大幅度优化了晶圆翘曲,并减少了流片过程中的异常。Trench gate IGBT is the main stream development direction to improve the power density and performance of power semiconductor devices.However,with the improvement of chip refinement,the wafer warpage generated during the preparation process is greater,which is more likely to affect the processing and process effect.So the warpage control in the chip preparation process has become a new concern.The causes of warpage during the preparation process of trench gate IGBT were systematically analyzed,and optimization solutions were proposed from three aspects:single process preparation conditions,novel trench structure with certain polysilicon/oxide layer thickness,and removal site flow of backside film.By integrating various optimization methods,the warpage of IGBT wafers is reduced from±120μm to less than±50μm,drastically optimizing wafer warpage and reducing abnormality in the chip preparation process.

关 键 词：IGBT 翘曲控制 工艺优化 多晶硅 铝金属 

分 类 号：TN305[电子电信—物理电子学]