基于FPGA和千兆以太网传输的多通道数据采集系统  

Multi-channel Data Acquisition System Based on FPGA and Gigabit Ethernet Transmission

作　　者：邓海涛 伍春[1] 陈习龙 DENG Haitao;WU Chun;CHEN Xilong(School of National Defense Science and Technology,Southwest University of Science and Technology)

机构地区：[1]西南科技大学国防科技学院

出　　处：《仪表技术与传感器》2025年第2期52-56,共5页Instrument Technique and Sensor

基　　金：国家自然科学基金项目(61771410);四川省科技厅项目重点研发计划(2023YFG0135)。

摘　　要：为保证开展多点数据采集试验时,数据的采集和传输能够高速稳定进行,设计了一种基于FPGA+PHY硬件平台的多通道数据采集系统。以XC7K325T为主控芯片,将多路传感器或信号源输出的电压信号经过增益调整和滤波输入到LTC2358模数转换器进行并行转换,将转换后的数据缓存至FIFO中,经过数据组帧处理后存储到eMMC中,通过千兆以太网技术利用PHY芯片将数据传输至上位机。通过Wireshark抓包与采集模拟小信号,试验表明:系统数据传输速度达到954 Mbit/s, 70 m通信距离时丢包率为0.07%,且满足-20~20 mV范围的小信号最值误差低于±0.1 mV和均值误差低于±0.01 mV的指标,验证了设计的多通道数据采集系统的稳定性和高效性。A multi-channel data acquisition system based on FPGA+PHY hardware platform was designed to ensure the high speed and stability of data acquisition and transmission during multi-point data acquisition experiments.With the XC7K325T as the main control chip,the voltage signal output by multiple sensor signals or signal sources was input to the LTC2358 analog-to-digital converter for parallel conversion through gain adjustment and filtering,and the converted data was cached into the FIFO,stored in the eMMC after data framing processing,and the data was transmitted to the host computer by using the PHY chip through gigabit Ethernet technology.The Wireshark packet capture and acquisition simulation small signal test shows that the data transmission speed of the system reaches 954 Mbit/s,the packet loss rate is 0.07%at 70 m communication distance,and the minimum error of the small signal in the range of-20~20 mV is less than±0.1 mV and the mean error is less than±0.01 mV,which verifies the stability and efficiency of the designed multi-channel data acquisition system.

关 键 词：多通道 数据采集 千兆以太网 FPGA PHY 并行转换 

分 类 号：TP274[自动化与计算机技术—检测技术与自动化装置]