一种应用于电流舵DAC的熔丝校准方法  

Fuse Calibration Scheme Applied in Current-Steering DAC

作　　者：何光旭 袁何龙 王佳琪 HE Guangxu;YUAN Helong;WANG Jiaqi(China Electronics Technology Group Corporation No.58 Research Institute,Wuxi 214035,China)

机构地区：[1]中国电子科技集团公司第五十八研究所,江苏无锡214035

出　　处：《电子与封装》2025年第4期63-66,共4页Electronics & Packaging

摘　　要：为解决电流舵DAC中的电流源失配问题,提出了一种熔丝校准方法,通过静态校准技术来修正工艺偏差带来的电流源失配,其核心是熔丝预编程架构,允许对多个独立的熔丝校正单元执行多次预写迭代烧录,从而微调电流输出,直至通过实际测试验证满足既定性能标准,最终执行永久烧录。设计的电路基于0.18μm CMOS工艺流片,测试结果表明,电路的DNL从校准前的-0.1~0.299 LSB降到校准后的-0.05~0.197 LSB。To address the current source mismatch issue in current-steering DACs,a fuse calibration scheme is proposed.Static calibration technique is used to correct current source mismatch due to process deviations.The core is a fuse preprogramming architecture that allows multiple iterations of preliminary write-and-erase on multiple independent fuse correction units.This meticulous tuning of current output continues until actual testing verifies conformity with established performance criteria,and finally permanent burn-in is performed.The test results of the circuit designed based on the 0.18μm CMOS process after tape-out show that the DNL of the circuit is reduced from-0.1-0.029 LSB before calibration to-0.5-0.197 LSB after calibration.

关 键 词：熔丝校准 预写迭代 DNL 电流舵DAC 

分 类 号：TN431.1[电子电信—微电子学与固体电子学]