面向调制连续波系统的数字锁相环技术发展综述  

Review of digital phase-locked loop technology developmentfor frequency modulated continuous wave systems

作　　者：陈永利 冀子川 肖衍 宗佳铭 CHEN Yongli;JI Zichuan;XIAO Yan;ZONG Jiaming(Beijing Smartchip Microelectronics Technology Company Limited,Beijing 100192,China;Beihang University,Beijing 100191,China)

机构地区：[1]北京智芯微电子科技有限公司,北京100192 [2]北京航空航天大学集成电路科学与工程学院,北京100191

出　　处：《集成电路与嵌入式系统》2025年第5期35-44,共10页Integrated Circuits and Embedded Systems

摘　　要：首先介绍了调制连续波(FMCW)雷达系统对锁相环的3个主要要求:调频带宽、调频斜率和线性度。而后从近10年来高引用量、高影响力文章出发,分析了数字锁相环(DPLL)在频率FMCW系统中的优势及应用难点,并简述了现有的克服应用难点的方法。总结了3个主要要求上锁相环的发展趋势,并提出一种新的优值定义用来评估FMCW系统锁相环的优劣。最后,指出数字锁相环是未来发展高性能FMCW系统的重点研究方向。This article first introduces three main requirements of a phase-locked loop(PLL)for Frequency Modulated Continuous Wave(FMCW)radar systems:frequency modulation bandwidth,frequency modulation slope,and linearity.Then,based on highly cited and influential articles from the past decade,it analyzes the advantages and application challenges of digital phase-locked loops(DPLL)in FMCW systems and briefly outlines the existing methods to overcome these challenges.The development trends of phase-locked loops in relation to the three main requirements are summarized,and a new figure of merit definition is proposed to evaluate the performance of PLLs for FMCW systems.Finally,it is pointed out that digital phase-locked loops are a key research direction for developing high-performance FMCW systems in the future.

关 键 词：数字锁相环 DPLL FMCW 数字预失真 

分 类 号：TN47[电子电信—微电子学与固体电子学]